CY7C1049CV33-10VXAT Cypress Semiconductor Corp, CY7C1049CV33-10VXAT Datasheet
CY7C1049CV33-10VXAT
Specifications of CY7C1049CV33-10VXAT
Related parts for CY7C1049CV33-10VXAT
CY7C1049CV33-10VXAT Summary of contents
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... Document #: 38-05006 Rev. *K 4-Mbit (512 K × 8) Static RAM Functional Description The CY7C1049CV33 is a high performance CMOS Static RAM organized as 524,288 words by eight bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW ...
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... Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 4 Thermal Resistance .......................................................... 4 AC Switching Characteristics ......................................... 6 Switching Waveforms ...................................................... 7 Truth Table ........................................................................ 8 Document #: 38-05006 Rev. *K CY7C1049CV33 Ordering Information ....................................................... 9 Ordering Code Definitions ........................................... 9 Package Diagram ........................................................... 10 Acronyms ........................................................................ 11 Document Conventions ................................................. 11 Units of Measure ....................................................... 11 Document History Page ................................................. 12 Sales, Solutions, and Legal Information ...................... 13 Worldwide Sales and Design Support ....................... 13 Products ...
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... Output Enable, active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins. Ground for the device. Should be connected to ground of the system. Power supply inputs to the device. CY7C1049CV33 -8 Unit 8 ns ...
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... CE > V – 0 > V – 0 < 0 Test Conditions = 25 MHz 3 Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. CY7C1049CV33 [2] .................................. –0 0 .................................... –0 0 Ambient Temperature C to +70 C 3.3 V 0 Min Max 2.4 – – ...
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... High Z characteristics are tested for all speeds using the test load shown in Document #: 38-05006 Rev. *K Figure 2. AC Test Loads and Waveforms 50 30 pF* 1.5 V (a) High Z characteristics: ALL INPUT PULSES 90% 10% (c) Fall Time: 1 V/ns Figure 2 Figure 2 CY7C1049CV33 [4] 12-, 15-ns devices: R 317 3.3 V OUTPUT 351 (b) R 317 3.3 V OUTPUT 351 ...
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... The minimum Write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t Document #: 38-05006 Rev. *K Description [7, 8] [7, 8] [8] [7, 8] values until the first memory access can be performed less than less than t , and t is less than t LZCE HZOE LZOE HZWE and t HZWE CY7C1049CV33 -8 Min Max Unit s 100 – 8 – ns – – ns – – ...
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... If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 16. During this period, the I/Os are in output state. Do not apply input signals. Document #: 38-05006 Rev OHA DOE DATA VALID 50 SCE PWE t SD DATA VALID CY7C1049CV33 [11, 12] DATA VALID [12, 13] t HZOE t HZCE HIGH IMPEDANCE 50 [14, 15 Page [+] Feedback ...
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... If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state. 18. During this period, the I/Os are in output state. Do not apply input signals. Document #: 38-05006 Rev SCE PWE t SD DATA VALID –I/O Mode 7 Power Down Read Write Selected, Outputs Disabled CY7C1049CV33 [17 LZWE Power Standby ( Active ( Active ( Active ( ...
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... TSOP II (Pb-free Temperature Range Commercial X = Pb-free; X Absent = Leaded Package Type 44-pin TSOP II Speed Grade V33 = 3 3.6 V Process Technology:C 150 nm Data width: × 8-bits 4-Mbit density Fast Asynchronous SRAM Marketing Code SRAMs Company ID Cypress CY7C1049CV33 Operating Range Commercial Page [+] Feedback ...
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... Package Diagram Document #: 38-05006 Rev. *K Figure 7. 44-pin TSOP II, 51-85087 CY7C1049CV33 51-85087 *C Page [+] Feedback ...
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... Document Conventions Units of Measure Symbol Unit of Measure ohms ns nano seconds V Volts µs micro seconds µA micro Amperes mA milli Amperes mm milli meter ms milli seconds MHz Mega Hertz pF pico Farad % percent mW milli Watts W Watts °C degree Celcius Document #: 38-05006 Rev. *K CY7C1049CV33 Page [+] Feedback ...
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... Document History Page Document Title: CY7C1049CV33 4-Mbit (512 K × 8) Static RAM Document Number: 38-05006 Rev. ECN Orig. of Submission Change Date ** 112569 HGK 03/06/02 *A 114091 DFP 04/25/02 *B 116479 CEA 09/16/02 *C 262949 RKF See ECN *D 300091 RKF See ECN *E 344595 SYT See ECN ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-05006 Rev. *K All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised March 02, 2011 CY7C1049CV33 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...