DSPIC33FJ128MC706A-E/MR Microchip Technology, DSPIC33FJ128MC706A-E/MR Datasheet - Page 109

• Manufacturer Part Number: DSPIC33FJ128MC706A-E/MR
• Description: 16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC706A-E/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 7-12:
 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
R/W-0
R/W-0
IC5IE
T6IE
T6IE: Timer6 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA4IE: DMA Channel 4 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
OC8IE: Output Compare Channel 8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC7IE: Output Compare Channel 7 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC6IE: Output Compare Channel 6 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC5IE: Output Compare Channel 5 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC6IE: Input Capture Channel 6 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC5IE: Input Capture Channel 5 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC4IE: Input Capture Channel 4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC3IE: Input Capture Channel 3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA3IE: DMA Channel 3 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C1IE: ECAN1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA4IE
R/W-0
R/W-0
IC4IE
IEC2: INTERRUPT ENABLE CONTROL REGISTER 2
dsPIC33FJXXXMCX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
R/W-0
IC3IE
U-0
—
DMA3IE
OC8IE
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OC7IE
R/W-0
R/W-0
C1IE
C1RXIE
OC6IE
R/W-0
R/W-0
x = Bit is unknown
SPI2IE
OC5IE
R/W-0
R/W-0
DS70594B-page 109
SPI2EIE
R/W-0
R/W-0
IC6IE
bit 8
bit 0