DSPIC33FJ128MC706A-E/PT Microchip Technology, DSPIC33FJ128MC706A-E/PT Datasheet - Page 263

16 Bit MCU/DSP 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY

DSPIC33FJ128MC706A-E/PT

Manufacturer Part Number
DSPIC33FJ128MC706A-E/PT
Description
16 Bit MCU/DSP 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC706A-E/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC706A-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
24.0
The dsPIC33F instruction set is identical to that of the
dsPIC30F.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word, divided
into an 8-bit opcode, which specifies the instruction
type and one or more operands, which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 24-1 shows the general symbols used in
describing the instructions.
The dsPIC33F instruction set summary in Table 24-2
lists all the instructions, along with the status flags
affected by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand which is typically a
• The second source operand which is typically a
• The destination of the result which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value ‘f’
• The destination, which could either be the file
 2009 Microchip Technology Inc.
Note:
register ‘Wb’ without any address modifier
register ‘Ws’ with or without an address modifier
register ‘Wd’ with or without an address modifier
register ‘f’ or the W0 register, which is denoted as
‘WREG’
INSTRUCTION SET SUMMARY
This data sheet summarizes the features
of
X10A family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the related section
in
Reference Manual”, which is available
from
(www.microchip.com).
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Preliminary
Most bit-oriented instructions (including simple rotate/
shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register
The literal instructions that involve data movement may
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand which is a register ‘Wb’
• The second source operand which is a literal
• The destination of the result (only if not the same
The MAC class of DSP instructions may use some of the
following operands:
• The accumulator (A or B) to be used (required
• The W registers to be used as the two operands
• The X and Y address space prefetch operations
• The X and Y address space prefetch destinations
• The accumulator write back destination
The other DSP instructions do not involve any
multiplication and may include:
• The accumulator to be used (required)
• The source or destination operand (designated as
• The amount of shift specified by a W register ‘Wn’
The control instructions may use some of the following
operands:
• A program memory address
• The mode of the table read and table write
modifier) or file register (specified by the value of
‘Ws’ or ‘f’)
(specified by a literal value or indirectly by the
contents of register ‘Wb’)
register (specified by the value of ‘k’)
value is to be loaded (specified by ‘Wb’ or ‘f’)
without any address modifier
value
as the first source operand) which is typically a
register ‘Wd’ with or without an address modifier
operand)
Wso or Wdo, respectively) with or without an
address modifier
or a literal value
instructions
DS70594B-page 263

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