DSPIC33FJ128MC706A-E/PT Microchip Technology, DSPIC33FJ128MC706A-E/PT Datasheet - Page 78

16 Bit MCU/DSP 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY

DSPIC33FJ128MC706A-E/PT

Manufacturer Part Number
DSPIC33FJ128MC706A-E/PT
Description
16 Bit MCU/DSP 40MIPS 128KB FLASH 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC706A-E/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC706A-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33FJXXXMCX06A/X08A/X10A
5.4.1
The user can program one row of program Flash
memory at a time. To do this, it is necessary to erase
the 8-row erase page that contains the desired row.
The general process is as follows:
1.
2.
3.
EXAMPLE 5-1:
DS70594B-page 78
; Set up NVMCON for block erase operation
; Init pointer to row to be ERASED
Read
(512 instructions) and store it in data RAM.
Update the program data in RAM with the
desired new data.
Erase the block (see Example 5-1):
a)
b)
c)
d)
e)
Set the NVMOP bits (NVMCON<3:0>) to
‘0010’ to configure for block erase. Set the
ERASE
(NVMCON<14>) bits.
Write the starting address of the page to be
erased into the TBLPAG and W registers.
Write 0x55 to NVMKEY.
Write 0xAA to NVMKEY.
Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the dura-
tion of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
MOV
MOV
MOV
MOV
MOV
TBLWTL W0, [W0]
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
eight
#0x4042, W0
W0, NVMCON
#tblpage(PROG_ADDR), W0
W0, TBLPAG
#tbloffset(PROG_ADDR), W0
#5
#0x55, W0
W0, NVMKEY
#0xAA, W1
W1, NVMKEY
NVMCON, #WR
(NVMCON<6>)
rows
ERASING A PROGRAM MEMORY PAGE
of
program
and
memory
WREN
Preliminary
;
; Initialize NVMCON
;
; Initialize PM Page Boundary SFR
; Initialize in-page EA[15:0] pointer
; Set base address of erase block
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 55 key
;
; Write the AA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
4.
5.
6.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as shown
in Example 5-3.
Write the first 64 instructions from data RAM into
the program memory buffers (see Example 5-2).
Write the program block to Flash memory:
a)
b)
c)
d)
Repeat steps 4 and 5 using the next available
64 instructions from the block in data RAM by
incrementing the value in TBLPAG until all
512 instructions are written back to Flash memory.
Set the NVMOP bits to ‘0001’ to configure
for row programming. Clear the ERASE bit
and set the WREN bit.
Write 0x55 to NVMKEY.
Write 0xAA to NVMKEY.
Set the WR bit. The programming cycle
begins and the CPU stalls for the duration of
the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
 2009 Microchip Technology Inc.

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