DSPIC33FJ128MC706AT-I/MR Microchip Technology, DSPIC33FJ128MC706AT-I/MR Datasheet - Page 18

16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm T/R

DSPIC33FJ128MC706AT-I/MR

Manufacturer Part Number
DSPIC33FJ128MC706AT-I/MR
Description
16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC706AT-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC33FJXXXMCX06A/X08A/X10A
TABLE 1-1:
DS70594B-page 18
RA0-RA7
RA9-RA10
RA12-RA15
RB0-RB15
RC1-RC4
RC12-RC15
RD0-RD15
RE0-RE9
RF0-RF8
RF12-RF13
RG0-RG3
RG6-RG9
RG12-RG15
SCK1
SDI1
SDO1
SS1
SCK2
SDI2
SDO2
SS2
SCL1
SDA1
SCL2
SDA2
SOSCI
SOSCO
TMS
TCK
TDI
TDO
T1CK
T2CK
T3CK
T4CK
T5CK
T6CK
T7CK
T8CK
T9CK
U1CTS
U1RTS
U1RX
U1TX
U2CTS
U2RTS
U2RX
U2TX
V
V
Legend: CMOS = CMOS compatible input or output
DD
CAP
Pin Name
/V
DDCORE
ST = Schmitt Trigger input with CMOS levels
PINOUT I/O DESCRIPTIONS (CONTINUED)
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
P
P
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
ST/CMOS
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTA is a bidirectional I/O port.
PORTB is a bidirectional I/O port.
PORTC is a bidirectional I/O port.
PORTD is a bidirectional I/O port.
PORTE is a bidirectional I/O port.
PORTF is a bidirectional I/O port.
PORTG is a bidirectional I/O port.
Synchronous serial clock input/output for SPI1.
SPI1 data in.
SPI1 data out.
SPI1 slave synchronization or frame pulse I/O.
Synchronous serial clock input/output for SPI2.
SPI2 data in.
SPI2 data out.
SPI2 slave synchronization or frame pulse I/O.
Synchronous serial clock input/output for I2C1.
Synchronous serial data input/output for I2C1.
Synchronous serial clock input/output for I2C2.
Synchronous serial data input/output for I2C2.
32.768 kHz low-power oscillator crystal input; CMOS otherwise.
32.768 kHz low-power oscillator crystal output.
JTAG Test mode select pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
Timer1 external clock input.
Timer2 external clock input.
Timer3 external clock input.
Timer4 external clock input.
Timer5 external clock input.
Timer6 external clock input.
Timer7 external clock input.
Timer8 external clock input.
Timer9 external clock input.
UART1 clear to send.
UART1 ready to send.
UART1 receive.
UART1 transmit.
UART2 clear to send.
UART2 ready to send.
UART2 receive.
UART2 transmit.
Positive supply for peripheral logic and I/O pins.
CPU logic filter capacitor connection.
Preliminary
Analog = Analog input
O = Output
Description
 2009 Microchip Technology Inc.
P = Power
I = Input

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