DSPIC33FJ128MC706AT-I/MR Microchip Technology, DSPIC33FJ128MC706AT-I/MR Datasheet - Page 217

16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm T/R

DSPIC33FJ128MC706AT-I/MR

Manufacturer Part Number
DSPIC33FJ128MC706AT-I/MR
Description
16 Bit MCU/DSP 40MIPS 128KB FLASH 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC706AT-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.0
21.1
The Enhanced Controller Area Network (ECAN™
technology) module is a serial interface, useful for com-
municating with other CAN modules or microcontroller
devices. This interface/protocol was designed to allow
communications within noisy environments. The
dsPIC33FJXXXMCX06A/X08A/X10A devices contain
up to two ECAN modules.
The CAN module is a communication controller imple-
menting the CAN 2.0 A/B protocol, as defined in the
BOSCH specification. The module will support CAN 1.2,
CAN 2.0A, CAN 2.0B Passive and CAN 2.0B Active
versions of the protocol. The module implementation is
a full CAN system. The CAN specification is not covered
within this data sheet. The reader may refer to the
BOSCH CAN specification for further details.
The module features are as follows:
• Implementation of the CAN protocol, CAN 1.2,
• Standard and extended data frames
• 0-8 bytes data length
• Programmable bit rate up to 1 Mbit/sec
• Automatic response to remote transmission
• Up to eight transmit buffers with application speci-
• Up to 32 receive buffers (each buffer may contain
• Up to 16 full (standard/extended identifier)
• Three full acceptance filter masks
• DeviceNet™ addressing support
• Programmable wake-up functionality with
• Programmable Loopback mode supports self-test
 2009 Microchip Technology Inc.
CAN 2.0A and CAN 2.0B
requests
fied prioritization and abort capability (each buffer
may contain up to 8 bytes of data)
up to 8 bytes of data)
acceptance filters
integrated low-pass filter
operation
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
ENHANCED CAN MODULE
Overview
of the dsPIC33FJXXXMCX06A/X08A/
X10A family of devices. However, it is not
intended to be a comprehensive refer-
ence source. To complement the informa-
tion in this data sheet, refer to Section
15. “Enhanced Controller Area Net-
work (ECAN™)” (DS70185) in the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
dsPIC33FJXXXMCX06A/X08A/X10A
Preliminary
• Signaling via interrupt capabilities for all CAN
• Programmable clock source
• Programmable link to input capture module (IC2
• Low-power Sleep and Idle mode
The CAN bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.
21.2
The CAN module transmits various types of frames
which include data messages, or remote transmission
requests initiated by the user, as other frames that are
automatically generated for control purposes. The
following frame types are supported:
• Standard Data Frame:
• Extended Data Frame:
• Remote Frame:
• Error Frame:
• Overload Frame:
• Interframe Space:
receiver and transmitter error states
for both CAN1 and CAN2) for time-stamping and
network synchronization
A standard data frame is generated by a node
when the node wishes to transmit data. It includes
an 11-bit Standard Identifier (SID), but not an
18-bit Extended Identifier (EID).
An extended data frame is similar to a standard
data frame, but includes an extended identifier as
well.
It is possible for a destination node to request the
data from the source. For this purpose, the
destination node sends a remote frame with an
identifier that matches the identifier of the required
data frame. The appropriate data source node will
then send a data frame as a response to this
remote request.
An error frame is generated by any node that
detects a bus error. An error frame consists of two
fields: an error flag field and an error delimiter field.
An overload frame can be generated by a node as
a result of two conditions. First, the node detects a
dominant bit during interframe space which is an
illegal condition. Second, due to internal condi-
tions, the node is not yet able to start reception of
the next message. A node may generate a maxi-
mum of 2 sequential overload frames to delay the
start of the next message.
Interframe space separates a proceeding frame
(of whatever type) from a following data or remote
frame.
Frame Types
DS70594B-page 217

Related parts for DSPIC33FJ128MC706AT-I/MR