DSPIC33FJ128MC708A-E/PT Microchip Technology, DSPIC33FJ128MC708A-E/PT Datasheet - Page 214

no-image

DSPIC33FJ128MC708A-E/PT

Manufacturer Part Number
DSPIC33FJ128MC708A-E/PT
Description
16 Bit MCU/DSP 40MIPS 128KB FLASH 80 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC708A-E/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC708A-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 20-2:
DS70594B-page 214
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15,13
bit 14
bit 12
bit 11
bit 10
bit 9
bit 8
Note 1:
UTXISEL1
R/W-0
R/W-0
URXISEL<1:0>
Refer to Section 17. “UART” (DS70188) in the “dsPIC33F/PIC24H Family Reference Manual” for infor-
mation on enabling the UART module for transmit operation.
UTXISEL<1:0>: Transmission Interrupt Mode Selection bits
11 = Reserved; do not use
10 = Interrupt when a character is transferred to the Transmit Shift Register (TSR), and as a result,
01 = Interrupt when the last character is shifted out of the Transmit Shift Register; all transmit
00 = Interrupt when a character is transferred to the Transmit Shift Register (this implies there is at
UTXINV: Transmit Polarity Inversion bit
If IREN = 0:
1 = UxTX Idle state is ‘0’
0 = UxTX Idle state is ‘1’
If IREN = 1:
1 = IrDA
0 = IrDA encoded UxTX Idle state is ‘0’
Unimplemented: Read as ‘0’
UTXBRK: Transmit Break bit
1 = Send Sync Break on next transmission – Start bit, followed by twelve ‘0’ bits, followed by Stop bit;
0 = Sync Break transmission disabled or completed
UTXEN: Transmit Enable bit
1 = Transmit enabled, UxTX pin controlled by UARTx
0 = Transmit disabled, any pending transmission is aborted and the buffer is reset. UxTX pin
UTXBF: Transmit Buffer Full Status bit (read-only)
1 = Transmit buffer is full
0 = Transmit buffer is not full, at least one more character can be written
TRMT: Transmit Shift Register Empty bit (read-only)
1 = Transmit Shift Register is empty and the transmit buffer is empty (the last transmission has
0 = Transmit Shift Register is not empty, a transmission is in progress or queued
UTXINV
R/W-0
R/W-0
cleared by hardware upon completion
controlled by port.
completed)
U
the transmit buffer becomes empty
operations are completed
least one character open in the transmit buffer)
x
STA: UART
®
encoded UxTX Idle state is ‘1’
HC = Hardware Clearable bit
W = Writable bit
‘1’ = Bit is set
UTXISEL0
ADDEN
R/W-0
R/W-0
x
STATUS AND CONTROL REGISTER
(1)
RIDLE
U-0
R-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0 HC
UTXBRK
PERR
R-0
UTXEN
R/W-0
FERR
R-0
(1)
 2009 Microchip Technology Inc.
x = Bit is unknown
UTXBF
OERR
R/C-0
R-0
URXDA
TRMT
R-1
R-0
bit 8
bit 0

Related parts for DSPIC33FJ128MC708A-E/PT