DSPIC33FJ16MC304-E/PT Microchip Technology, DSPIC33FJ16MC304-E/PT Datasheet - Page 71

16-bit DSC, 16KB Flash,Motor,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY

DSPIC33FJ16MC304-E/PT

Manufacturer Part Number
DSPIC33FJ16MC304-E/PT
Description
16-bit DSC, 16KB Flash,Motor,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16MC304-E/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ16MC304-E/PTTR
DSPIC33FJ16MC304-E/PTTR

Available stocks

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Quantity
Price
Part Number:
DSPIC33FJ16MC304-E/PT
Manufacturer:
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Quantity:
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Part Number:
DSPIC33FJ16MC304-E/PT
Manufacturer:
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7.0
The
dsPIC33FJ16MC304 interrupt controller reduces the
numerous peripheral interrupt request signals to a
single
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
CPU. It has the following features:
• Up to 8 processor exceptions and software traps
• 7 user-selectable priority levels
• Interrupt Vector Table (IVT) with up to 118 vectors
• A unique vector for each interrupt or exception
• Fixed priority within a specified user priority level
• Alternate Interrupt Vector Table (AIVT) for debug
• Fixed interrupt entry and return latencies
7.1
The Interrupt Vector Table (IVT) is shown in
The IVT resides in program memory, starting at location
000004h. The IVT contains 126 vectors consisting of
8 nonmaskable trap vectors plus up to 118 sources of
interrupt. In general, each interrupt source has its own
vector. Each interrupt vector contains a 24-bit-wide
address. The value programmed into each interrupt
vector location is the starting address of the associated
Interrupt Service Routine (ISR).
Interrupt vectors are prioritized in terms of their natural
priority. This priority is linked to their position in the
vector table. Lower addresses generally have a higher
natural priority. For example, the interrupt associated
with vector 0 will take priority over interrupts at any
other vector address.
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
devices implement up to 26 unique interrupts and 4
nonmaskable traps. These are summarized in
Table 7-1
© 2011 Microchip Technology Inc.
source
support
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
INTERRUPT CONTROLLER
Interrupt Vector Table
and
interrupt
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 devices. It is not
intended to be a comprehensive refer-
ence source. To complement the infor-
mation in this data sheet, refer to Section
32. “Interrupts (Part III)” (DS70214) of
the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Table
dsPIC33FJ32MC202/204
7-2.
request
signal
Figure
to
and
7-1.
the
in
7.1.1
The Alternate Interrupt Vector Table (AIVT) is located
after the IVT, as shown in
AIVT
(INTCON2<15>). If the ALTIVT bit is set, all interrupt
and exception processes use the alternate vectors
instead of the default vectors. The alternate vectors are
organized in the same manner as the default vectors.
The AIVT supports debugging by providing a means to
switch between an application and a support
environment without requiring the interrupt vectors to
be reprogrammed. This feature also enables switching
between applications for evaluation of different
software algorithms at run time. If the AIVT is not
needed, the AIVT should be programmed with the
same addresses used in the IVT.
7.2
A device Reset is not a true exception because the
interrupt controller is not involved in the Reset process.
The
dsPIC33FJ16MC304 device clears its registers in
response to a Reset, which forces the PC to zero. The
digital signal controller then begins program execution
at location 0x000000. A GOTO instruction at the Reset
address can redirect program execution to the
appropriate start-up routine.
Note:
is
Reset Sequence
provided
ALTERNATE INTERRUPT VECTOR
TABLE
Any unimplemented or unused vector
locations in the IVT and AIVT should be
programmed with the address of a default
interrupt handler routine that contains a
RESET instruction.
dsPIC33FJ32MC202/204
by
the
Figure
ALTIVT
7-1. Access to the
DS70283H-page 71
control
and
bit

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