EPF6016ATI144-3 Altera, EPF6016ATI144-3 Datasheet

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EPF6016ATI144-3

Manufacturer Part Number
EPF6016ATI144-3
Description
FLEX 6000
Manufacturer
Altera
Datasheet

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Features...
Note:
(1)
Altera Corporation
A-DS-F6000-04.1
March 2001, ver. 4.1
Typical gates
Logic elements (LEs)
Maximum I/O pins
Supply voltage (V
Table 1. FLEX 6000 Device Features
The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 14,000 gates in addition to the listed typical gates.
Feature
(1)
CCINT
)
System-level features
Provides an ideal low-cost, programmable alternative to high-
volume gate array applications and allows fast design changes
during prototyping or design testing
Product features
EPF6010A
10,000
3.3 V
880
102
Register-rich, look-up table- (LUT-) based architecture
OptiFLEX
Typical gates ranging from 5,000 to 24,000 gates (see
Built-in low-skew clock distribution tree
100% functional testing of all devices; test vectors or scan chains
are not required
In-circuit reconfigurability (ICR) via external configuration
device or intelligent controller
5.0-V devices are fully compliant with peripheral component
interconnect Special Interest Group (PCI SIG) PCI Local Bus
Specification, Revision 2.2
Built-in Joint Test Action Group (JTAG) boundary-scan test
(BST) circuitry compliant with IEEE Std. 1149.1-1990, available
without consuming additional device logic
MultiVolt
between systems operating at different voltages
Low power consumption (typical specification less than 0.5 mA
in standby mode)
3.3-V devices support hot-socketing
®
TM
®
architecture that increases device area efficiency
I/O interface operation, allowing a device to bridge
EPF6016
16,000
1,320
5.0 V
204
EPF6016A
16,000
Programmable Logic
1,320
3.3 V
171
FLEX 6000
Device Family
EPF6024A
24,000
Data Sheet
1,960
3.3 V
Table
218
1)
1

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