EPM7064STC44-6N Altera, EPM7064STC44-6N Datasheet - Page 32

• Manufacturer Part Number: EPM7064STC44-6N
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

MAX 7000 Programmable Logic Device Family Data Sheet
32
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IN
IO
FIN
SEXP
PEXP
LAD
LAC
IOE
OD1
OD2
OD3
ZX1
ZX2
ZX3
XZ
SU
H
FSU
FH
RD
COMB
IC
EN
GLOB
PRE
CLR
PIA
LPA
Table 20. MAX 7000 & MAX 7000E Internal Timing Parameters
Symbol
Input pad and buffer delay
I/O input pad and buffer delay
Fast input delay
Shared expander delay
Parallel expander delay
Logic array delay
Logic control array delay
Internal output enable delay
Output buffer and pad delay
Slow slew rate = off, V
Output buffer and pad delay
Slow slew rate = off, V
Output buffer and pad delay
Slow slew rate = on,
V
Output buffer enable delay
Slow slew rate = off, V
Output buffer enable delay
Slow slew rate = off, V
Output buffer enable delay
Slow slew rate = on
V
Output buffer disable delay
Register setup time
Register hold time
Register setup time of fast input
Register hold time of fast input
Register delay
Combinatorial delay
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
Low-power adder
CCIO
CCIO
= 5.0 V or 3.3 V
= 5.0 V or 3.3 V
Parameter
CCIO
CCIO
CCIO
CCIO
= 5.0 V
= 3.3 V
= 5.0 V
= 3.3 V
(2)
(2)
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 5 pF
(2)
(2)
(8)
Conditions
(7)
(2)
(7)
(2)
Speed Grade -6
Min
3.0
1.5
2.5
0.5
Note (1)
Max
10.0
0.4
0.4
0.8
3.5
0.8
2.0
2.0
2.0
2.5
7.0
4.0
4.5
9.0
4.0
0.8
0.8
2.5
2.0
0.8
2.0
2.0
0.8
Speed Grade -7
Min
3.0
2.0
3.0
0.5
Altera Corporation
10.0
Max
0.5
0.5
1.0
4.0
0.8
3.0
3.0
2.0
2.0
2.5
7.0
4.0
4.5
9.0
4.0
1.0
1.0
3.0
3.0
1.0
2.0
2.0
1.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns