EVAL-AD5272SDZ Analog Devices Inc, EVAL-AD5272SDZ Datasheet - Page 24

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EVAL-AD5272SDZ

Manufacturer Part Number
EVAL-AD5272SDZ
Description
EVALUATION BOARD
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5272SDZ

Main Purpose
Digital Potentiometer
Embedded
No
Utilized Ic / Part
AD5272
Primary Attributes
1 Channel, 1024 Position
Secondary Attributes
2.7 ~ 5.5 V, 5 ppm/°C, I²C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5272/AD5274
EXT_CAP CAPACITOR
A 1 μF capacitor to V
(see Figure 47) on power-up and throughout the operation of
the AD5272/AD5274.
TERMINAL VOLTAGE OPERATING RANGE
The positive V
AD5272/AD5274 define the boundary conditions for proper
2-terminal digital resistor operation. Supply signals present on
Terminal A and Terminal W that exceed V
by the internal forward-biased diodes (see Figure 48).
Figure 48. Maximum Terminal Voltages Set by V
DD
Figure 47. EXT_CAP Hardware Setup
and negative V
EXT_CAP
SS
1µF
C1
must be connected to the EXT_CAP pin
SS
AD5272/
AD5274
power supplies of the
MEMORY
50_OTP
BLOCK
V
V
SS
SS
DD
or V
V
V
A
W
DD
SS
DD
SS
and V
are clamped
SS
Rev. C | Page 24 of 28
The ground pins of the AD5272/AD5274 devices are primarily
used as digital ground references. To minimize the digital
ground bounce, join the AD5272/AD5274 ground terminal
remotely to the common ground. The digital input control
signals to the AD5272/AD5274 must be referenced to the
device ground pin (GND) and satisfy the logic level defined in
the Specifications section. An internal level shift circuit ensures
that the common-mode voltage range of the three terminals
extends from V
POWER-UP SEQUENCE
Because there are diodes to limit the voltage compliance at
Terminal A and Terminal W (see Figure 48), it is important to
power V
and Terminal W; otherwise, the diode is forward-biased such
that V
sequence is V
order of powering V
as long as they are powered after V
As soon as V
first sets the RDAC to midscale and then restores the last
programmed 50-TP value to the RDAC register.
DD
/V
DD
/V
SS
are powered unintentionally. The ideal power-up
DD
SS
SS
, GND, V
first before applying any voltage to Terminal A
SS
is powered, the power-on preset activates, which
to V
A
, V
DD
, regardless of the digital input level.
W
DD
, and digital inputs is not important
, digital inputs, V
DD
/V
SS
.
A
, and V
W
. The

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