EVAL-AD5532EBZ Analog Devices Inc, EVAL-AD5532EBZ Datasheet

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EVAL-AD5532EBZ

Manufacturer Part Number
EVAL-AD5532EBZ
Description
Evaluation Board I.c.
Manufacturer
Analog Devices Inc
Datasheets

Specifications of EVAL-AD5532EBZ

Number Of Dac's
32
Number Of Bits
14
Outputs And Type
32, Single Ended
Sampling Rate (per Second)
45k
Data Interface
Serial
Settling Time
22µs
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD5532
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FEATURES
High integration:
Adjustable voltage output range
Guaranteed monotonic
Readback capability
DSP/microcontroller compatible serial interface
Output impedance:
Output voltage span:
Infinite sample-and-hold capability to ±0.018% accuracy
Temperature range −40°C to +85°C
APPLICATIONS
Automatic test equipment
Optical networks
Level setting
Instrumentation
Industrial control systems
Data acquisition
Low cost I/O
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
32-channel DAC in 12 mm × 12 mm CSPBGA
0.5 Ω (AD5532-1, AD5532-2)
500 Ω (AD5532-3)
1 kΩ (AD5532-5)
10 V (AD5532-1, AD5532-3, AD5532-5)
20 V (AD5532-2)
TRACK/RESET
DAC_GND
SER/PAR
AGND
DGND
BUSY
V
IN
AD5532
SCLK D
INTERFACE
CONTROL
LOGIC
DV
ADC
MUX
CC
IN
D
AV
Figure 1. Functional Block Diagram
OUT
CC
REF_IN REF_OUT
SYNC/CS
DAC
DAC
DAC
GENERAL DESCRIPTION
The AD5532
an additional infinite sample-and-hold mode. The selected
DAC register is written to via the 3-wire serial interface; V
for this DAC is then updated to reflect the new contents of the
DAC register. DAC selection is accomplished via Address Bits
A0–A4. The output voltage range is determined by the offset
voltage at the OFFS_IN pin and the gain of the output amplifier.
It is restricted to a range from V
the headroom of the output amplifier.
The device is operated with AV
5.25 V; V
AD5532 requires a stable 3 V reference on REF_IN as well as an
offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1.
2.
3.
1
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
ADDRESS INPUT REGISTER
Protected by U.S. Patent No. 5,969,657; other patents pending.
A4–A0
32-channel, 14-bit DAC in one package, guaranteed
monotonic.
Available in a 74-lead CSPBGA package with a body size of
12 mm ×12 mm.
Droopless/infinite sample-and-hold mode.
OFFS_IN
CAL
SS
= −4.75 V to −16.5 V; and V
1
OFFSET_SEL
is a 32-channel, 14-bit voltage-output DAC with
V
DD
© 2010 Analog Devices, Inc. All rights reserved.
V
SS
Voltage-Output DAC
32-Channel, 14-Bit
V
V
OFFS_OUT
WR
OUT
OUT
CC
SS
= 5 V ± 5%; DV
0
31
+ 2 V to V
DD
= 8 V to 16.5 V. The
DD
www.analog.com
– 2 V because of
AD5532
CC
= 2.7 V to
OUT

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EVAL-AD5532EBZ Summary of contents

Page 1

FEATURES High integration: 32-channel DAC × CSPBGA Adjustable voltage output range Guaranteed monotonic Readback capability DSP/microcontroller compatible serial interface Output impedance: 0.5 Ω (AD5532-1, AD5532-2) 500 Ω (AD5532-3) 1 kΩ (AD5532-5) Output voltage span: 10 ...

Page 2

AD5532 TABLE OF CONTENTS Specifications ..................................................................................... 3 ISHA Mode .................................................................................... 5 Timing Characteristics ..................................................................... 6 Parallel Interface ........................................................................... 6 Parallel Interface Timing Diagrams ........................................... 6 Serial Interface .............................................................................. 7 Absolute Maximum Ratings ............................................................ 8 ESD Caution .................................................................................. 8 Pin Configuration ...

Page 3

SPECIFICATIONS 16 –4. –16 REF_IN = 3 V; output range from Table 1. Parameter 2 DAC DC PERFORMANCE Resolution ...

Page 4

AD5532 2 Parameter Input Capacitance 3 DIGITAL OUTPUTS (BUSY OUT Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage, DV ...

Page 5

ISHA MODE Table 2. 2 Parameter AD5532-1/-3/-5 ANALOG CHANNEL Nonlinearity ±0.018 IN OUT Offset Error ±50 Gain 3.46/3.52/3.6 ANALOG INPUT ( Input Voltage Range Input Lower Dead Band 70 Input Upper ...

Page 6

AD5532 TIMING CHARACTERISTICS PARALLEL INTERFACE Table Parameter Limit MIN MAX See Figure 2 and ...

Page 7

SERIAL INTERFACE Table Parameter Limit Version) MIN MAX CLKIN ...

Page 8

AD5532 ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. A Table 5. 1 Parameter Rating −0 + AGND DD +0 − AGND SS −0 ...

Page 9

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. 74-Lead CSPBGA Ball Configuration CSPBGA Number Ball Name A1 Not connected CS/SYNC SCLK A8 OFFSET_SEL BUSY A9 TRACK/RESET A10 A11 Not connected ...

Page 10

AD5532 Table 7. Pin Function Descriptions Pin Function AGND (1–2) Analog GND pins. AV (1–2) Analog Supply pins. Voltage range from 4. 5. (1–4) V Supply pins. Voltage range from 16.5 V. ...

Page 11

TERMINOLOGY DAC MODE Integral Nonlinearity (INL) This is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function expressed as a percentage of full-scale span. Differential Nonlinearity (DNL) This ...

Page 12

AD5532 TYPICAL PERFORMANCE CHARACTERISTICS 1 REFIN 0.8 OFFS_IN T = 25°C A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 10k DAC CODE Figure 10. Typical DNL Plot ...

Page 13

T = 25°C A 0.020 REFIN OFFS_IN 0.016 0.012 0.008 0.004 0 –0.004 –0.008 –0.012 –0.016 –0.020 –0.024 0.10 V (V) IN Figure 16 Accuracy after Offset and Gain Adjustment ...

Page 14

AD5532 FUNCTIONAL DESCRIPTION The AD5532 consists of 32 DACs and an ADC (for ISHA mode single package. In DAC mode, a 14-bit digital word is loaded into one of the 32 DAC Registers via the serial interface. This ...

Page 15

TRACK FUNCTION (ISHA MODE) Typically in ISHA mode of operation TRACK is held high and the channel begins to acquire when it is addressed. However, if TRACK is low when the channel is addressed, V the output buffer and an ...

Page 16

AD5532 SERIAL INTERFACE The serial interface allows easy interfacing to most micro- controllers and DSPs, such as the PIC16C, PIC17C, QSPI, SPI, DSP56000, TMS320, and ADSP-21xx, without the need for any glue logic. When interfacing to the 8051, the SCLK ...

Page 17

PARALLEL INTERFACE (ISHA MODE ONLY) The SER/ PAR bit must be tied low to enable the parallel interface and disable the serial interface. The parallel interface is controlled by nine pins, as described in Table 11. Pin Description CS Active ...

Page 18

AD5532 AD5532 to PIC16C6x/7x The PIC16C6x/7x synchronous serial port (SSP) is configured as an SPI master with the Clock Polarity Bit = 0. This is done by writing to the synchronous serial port control register (SSPCON). See the PIC16/17 Microcontroller ...

Page 19

Typical Application Circuit (ISHA Mode) The AD5532 can be used to set up voltage levels on 32 channels as shown in the circuit that follows. An AD780 provides the 3 V reference for the AD5532 and for the AD5541 16-bit ...

Page 20

... AD5532ABCZ-1REEL −40°C to +85°C AD5532ABCZ-2 −40°C to +85°C AD5532ABCZ-3 −40°C to +85°C AD5532ABC-5 EVAL-AD5532EBZ RoHS Compliant Part. © 2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 12.00 BSC ...

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