EVAL-AD7401AEDZ Analog Devices Inc, EVAL-AD7401AEDZ Datasheet - Page 13

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EVAL-AD7401AEDZ

Manufacturer Part Number
EVAL-AD7401AEDZ
Description
EVALUATION BOARD I.C.
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheets

Specifications of EVAL-AD7401AEDZ

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
20M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±320 mV
Power (typ) @ Conditions
105mW @ 20MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Utilized Ic / Part
AD7401A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TERMINOLOGY
Differential Nonlinearity (DNL)
DNL is the difference between the measured and the ideal 1
LSB change between any two adjacent codes
in the ADC.
Integral Nonlinearity (INL)
INL is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are specified negative full
scale, −250 mV (V
and specified positive full scale, +250 mV (V
58366 for the 16-bit level.
Offset Error
Offset error is the deviation of the midscale code (32768 for the
16-bit level) from the ideal V
Gain Error
The gain error includes both positive full-scale gain error and
negative full-scale gain error. Positive full-scale gain error is the
deviation of the specified positive full-scale code (58366 for the
16-bit level) from the ideal V
offset error is adjusted out. Negative full-scale gain error is the
deviation of the specified negative full-scale code (7169 for the
16-bit level) from the ideal V
offset error is adjusted out. Gain error includes reference error.
Signal-to-(Noise and Distortion) Ratio (SINAD)
SINAD is the measured ratio of signal-to-noise and distortion
at the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (f
dependent on the number of quantization levels in the digitization
process; the more levels, the smaller the quantization noise. The
theoretical signal-to-(noise and distortion) ratio for an ideal
N-bit converter with a sine wave input is given by
Therefore, for a 12-bit converter, this is 74 dB.
Effective Number of Bits (ENOB)
ENOB is defined by
Signal-to-(Noise and Distortion) = (6.02N + 1.76) dB
ENOB = (SINAD − 1.76)/6.02 bits
IN
+ − V
IN
−), Code 7169 for the 16-bit level,
IN
IN
IN
+ − V
+ − V
+ − V
S
/2), excluding dc. The ratio is
IN
IN
IN
− (that is, 0 V).
− (+250 mV) after the
− (−250 mV) after the
IN
+ − V
IN
−), Code
Rev. B | Page 13 of 20
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. For the AD7401A, it is defined as
where:
V
V
through the sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but
for ADCs where the harmonics are buried in the noise floor,
it is a noise peak.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output
at ±250 mV frequency, f, to the power of a 250 mV p-p sine
wave applied to the common-mode voltage of V
of frequency, f
where:
Pf is the power at frequency, f, in the ADC output.
Pf
Power Supply Rejection Ratio (PSRR)
Variations in power supply affect the full-scale transition but
not the converter’s linearity. PSRR is the maximum change in
the specified full-scale (±250 mV) transition point due to a
change in power supply voltage from the nominal value (see
Figure 6).
Isolation Transient Immunity
The isolation transient immunity specifies the rate of rise/fall of
a transient pulse applied across the isolation boundary beyond
which clock or data is corrupted. The AD7401A was tested
using a transient pulse frequency of 100 kHz.
1
2
S
, V
is the rms amplitude of the fundamental.
is the power at frequency, f
CMRR (dB) = 10 .log(Pf/Pf
THD
3
, V
4
(dB)
, V
5
, and V
=
S
, as
20
S
log
/2, excluding dc) to the rms value of the
6
are the rms amplitudes of the second
V
2
2
+
V
3
2
S
+
, in the ADC output.
S
V
V
)
1
4
2
+
V
5
2
+
V
6
2
IN
+ and V
AD7401A
IN

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