EVAL-AD7401EDZ Analog Devices Inc, EVAL-AD7401EDZ Datasheet - Page 3

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EVAL-AD7401EDZ

Manufacturer Part Number
EVAL-AD7401EDZ
Description
EVALUATION BOARD I.C.
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheets

Specifications of EVAL-AD7401EDZ

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
20M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±320 mV
Power (typ) @ Conditions
100mW @ 20MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Utilized Ic / Part
AD7401
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SPECIFICATIONS
V
f
Table 1.
Parameter
STATIC PERFORMANCE
ANALOG INPUT
DYNAMIC SPECIFICATIONS
LOGIC INPUTS
MCLK
DD1
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset Drift vs. Temperature
Offset Drift vs. V
Gain Error
Gain Error Drift vs. Temperature
Gain Error Drift vs. V
Input Voltage Range
Dynamic Input Current
DC Leakage Current
Input Capacitance
Signal-to-(Noise + Distortion) Ratio (SINAD)
Signal-to-Noise Ratio (SNR)
Effective Number of Bits (ENOB)
Isolation Transient Immunity
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise (SFDR)
= 4.5 V to 5.25 V, V
= 16 MHz maximum, tested with Sinc
3
3
IN
DD1
DD1
IL
IN
3
IH
5
DD2
3
= 3 V to 5.5 V, V
3
3
3
3
3
3
IN
filter, 256 decimation rate, as defined by Verilog code, unless otherwise noted.
+ = −200 mV to +200 mV, and V
Y Version
16
±15
±25
±55
±0.9
±0.6
±50
3.5
1
120
±1.6
±2
±1
23
110
±200
±9
±0.5
10
70
68
65
65
81
80
80
−92
−92
11.5
25
30
0.8 × V
0.2 × V
±0.5
10
DD2
DD2
1, 2
Rev. C | Page 3 of 20
Unit
Bits min
LSB max
LSB max
LSB max
LSB max
mV max
μV typ
μV/°C max
μV/°C typ
μV/V typ
mV max
mV max
mV typ
μV/°C typ
μV/V typ
mV min/mV max
μA max
μA max
pF typ
dB min
dB min
dB min
dB min
dB typ
dB min
dB min
dB typ
dB typ
Bits
kV/μs min
kV/μs typ
V min
V max
μA max
pF max
IN
− = 0 V (single-ended); T
Test Conditions/Comments
Filter output truncated to 16 bits
−40°C to +85°C; ±2 LSB typical; f
>85°C to 105°C
f
Guaranteed no missed codes to 16 bits;
f
f
T
−40°C to +105°C
−40°C to +85°C
>85°C to 105°C
f
−40°C to +105°C
For specified performance; full range ±320 mV
V
V
−40°C to +85°C; f
−40°C to +85°C; f
>85°C to 105°C
f
−40°C to +105°C; 82 dB typ
f
f
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
A
IN
IN
= 25°C
+ = 400 mV, V
+ = 5 kHz, 400 mV p-p sine
= 20 MHz maximum
= 20 MHz maximum
= 20 MHz maximum
= 20 MHz maximum
= 20 MHz maximum
= 20 MHz maximum
= 20 MHz maximum
IN
MCLK
MCLK
− = 0 V
= 9 MHz to 20 MHz
= 5 MHz to <9 MHz
4
4
4
4
4
4
4
A
; V
; V
; V
; V
; V
; V
; V
= T
IN
IN
IN
IN
IN
IN
IN
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
+ = −250 mV to +250 mV
MIN
MCLK
to T
= 20 MHz maximum
MAX
4
,
AD7401
4

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