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EVAL-ADG793GEBZ
EVAL-ADG793GEBZ | |
|---|---|
| Manufacturer Part Number | EVAL-ADG793GEBZ |
| Description | Evaluation Board I.c. |
| Manufacturer | Analog Devices Inc |
| EVAL-ADG793GEBZ datasheets |
|
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Warranty: 60 days
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Specifications of EVAL-ADG793GEBZ | |||
|---|---|---|---|
| Main Purpose | Interface, Analog Switch | Utilized Ic / Part | ADG793 |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | Secondary Attributes | - |
| Embedded | - | Primary Attributes | - |
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ADG793A/ADG793G
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
S1A
1
S1B
2
ADG793A
D1
3
TOP VIEW
NC
4
(Not to Scale)
S1C
5
NC
6
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE TIED TO GND.
Figure 3. ADG793A Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
S1A
A-Side Source Terminal for Mux 1. Can be an input or output.
2
S1B
B-Side Source Terminal for Mux 1. Can be an input or output.
3
D1
Drain Terminal for Mux 1. Can be an input or output.
4
NC
Not internally connected.
5
S1C
C-Side Source Terminal for Mux 1. Can be an input or output.
6
NC/GPO2
Not internally connected for ADG793A. General-Purpose Logic Output 2 for ADG793G.
7
S2A
A-Side Source Terminal for Mux 2. Can be an input or output.
8
S2B
B-Side Source Terminal for Mux 2. Can be an input or output.
9
D2
Drain Terminal for Mux 2. Can be an input or output.
10
NC
Not internally connected.
11
S2C
C-Side Source Terminal for Mux 2. Can be an input or output.
12
NC/GPO1
Not internally connected for ADG793A. General-Purpose Logic Output 1 for ADG793G.
13
S3A
A-Side Source Terminal for Mux 3. Can be an input or output
14
S3B
B-Side Source Terminal for Mux 3. Can be an input or output.
15
D3
Drain Terminal for Mux 3. Can be an input or output.
16
NC
Not internally connected.
17
S3C
C-Side Source Terminal for Mux 3. Can be an input or output.
18
A2
Logic Input. Sets Bit A2 from the third least significant bit of the 7-bit slave address.
19
A1
Logic Input. Sets Bit A1 from the second least significant bit of the 7-bit slave address.
20
A0
Logic Input. Sets Bit A0 from the first least significant bit of the 7-bit slave address.
21
SCL
Digital Input, Serial Clock Line. Open-drain input that is used in conjunction with SDA to clock data into
the device. External pull-up resistor required.
22
SDA
Digital I/O. Bidirectional open-drain data line. External pull-up resistor required.
23
V
Positive Power Supply Input.
DD
24
GND
Ground (0 V) Reference.
18 A2
17 S3C
16 NC
15 D3
14 S3B
13 S3A
Rev. 0 | Page 10 of 24
PIN 1
INDICATOR
S1A
1
18 A2
S1B
2
17 S3C
ADG793G
16 NC
D1
3
TOP VIEW
15 D3
NC
4
(Not to Scale)
S1C
5
14 S3B
GPO2
6
13 S3A
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE TIED TO GND.
Figure 4. ADG793G Pin Configuration
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