IC DGTL AUD PWM PROC 8CH 64TQFP

TAS5508CPAGR

Manufacturer Part NumberTAS5508CPAGR
DescriptionIC DGTL AUD PWM PROC 8CH 64TQFP
ManufacturerTexas Instruments
TypePWM Processor
TAS5508CPAGR datasheet
 


Specifications of TAS5508CPAGR

ApplicationsDVDMounting TypeSurface Mount
Package / Case64-TQFPNo. Of Channels8
Supply Voltage Range3V To 3.6VOperating Temperature Range0°C To +70°C
Amplifier Case StyleTQFPNo. Of Pins64
MslMSL 4 - 72 HoursControl InterfaceI2C, Serial
Rohs CompliantYesAudio Ic Case StyleTQFP
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-27840-2
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TAS5508C
8-Channel Digital Audio PWM Processor
Data Manual
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Literature Number: SLES257
September 2010

TAS5508CPAGR Summary of contents

  • Page 1

    TAS5508C 8-Channel Digital Audio PWM Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. ...

  • Page 2

    ... Output Mixer ........................................................................................................................ 2.12 PWM 2.12.1 DC Blocking (High-Pass Enable/Disable) 2.12.2 De-Emphasis Filter 2.12.3 Power-Supply Volume Control (PSVC) 2.12.4 AM Interference Avoidance 3 TAS5508C Controls and Status ....................................................................................................... 2 3 Status Registers 3.1.1 General Status Register (0x01) 2 Contents Contents ............................................................................................ .................................................................................................. ......................................................................................... ........................................................................................... ................................................................................................ ...................................................................................... ................................................................................................... ....................................................................... .............................................................................. ................................................................................... .................................................................................................. ................................................................................ ............................................................................................ ..................................................................... ............................................................................. ....................................................................... ..................................................................... .................................................................... ................................................................................................ ............................................................................................ ................................................................................................. ............................................................................................. .......................................................................................... ........................................................................................... .............................................................. ................................................................... ................................................................... ................................................................... ............................................................................................. ...................................................................... ................................................................................... ........................................................................................... ............................................................................... www.ti.com .................................................. ................................................ ................................. Copyright © 2010, Texas Instruments Incorporated ...

  • Page 3

    ... Mute Timing (MUTE) 4.7.8 Headphone Select (HP_SEL) 4.7.9 Volume Control 4.8 Serial Audio Interface Control and Timing ....................................................................................................... 2 4.8 Timing 4.8.2 Left-Justified Timing Copyright © 2010, Texas Instruments Incorporated .................................................................................. .................................................................................................. ................................................................................................. ............................................................................................ ................................................................................ .................................................................... ........................................................................................... ............................................................................. ......................................................................... ................................................................................. .................................................................................... ....................................................................... ............................................................................... ...

  • Page 4

    ... Copyright © 2010, Texas Instruments Incorporated ...

  • Page 5

    ... PSVC Range Register (0xDF) 7.37 General Control Register (0xE0) 7.38 Incremental Multiple-Write Append Register (0xFE) 8 TAS5508C Example Application Schematic Copyright © 2010, Texas Instruments Incorporated ........................................................................................... ........................................................................................ .................................................................. ......................................................................... TAS5508C SLES257 – SEPTEMBER 2010 101 Contents 5 ...

  • Page 6

    ... Single-Byte Write Transfer .................................................................................................... 5-3 Multiple-Byte Write Transfer ...................................................................................................... 5-4 Single-Byte Read Transfer .................................................................................................... 5-5 Multiple-Byte Read Transfer 6 List of Figures List of Figures ................................................................................................ ............................................................................. ......................................................... ........................................................... 2 C Registers (Fs ≤ 96 kHz Registers (Fs = 176.4 kHz 192 kHz) ..................................................................................... ............................................................ ............................................................................. 2 C Word ............................................................................. 2 C Word .................................................................... 2 C Words .......................................................................................... ........................................................................ ............................................................................ ........................................................ ............................................................................................ ................................................................................ ............................................................................. ..................................................................................... .............................................................................................. www.ti.com ......................................... .......... Copyright © 2010, Texas Instruments Incorporated ...

  • Page 7

    ... Device Outputs During Power Down 3-4 Device Outputs During Back-End Error 3-5 Description of the Channel Configuration Registers (0x05 to 0x0C) 3-6 Recommended TAS5508C Configurations for Texas Instruments Power Stages 3-7 Audio System Configuration (General Control Register 0xE0) ..................................................................................................... 3-8 Volume Ramp Rates in ms ...

  • Page 8

    ... AM Mode Register Format 7-50 AM Tuned Frequency Register in BCD Mode (Lower 2 Bytes of 0xDE) 7-51 AM Tuned Frequency Register in Binary Mode (Lower 2 Bytes of 0xDE) 7-52 PSVC Range Register Format 7-53 General Control Register Format 8 List of Tables .............................................................................. ....................................................................... ....................................................................................... ................................................................................ ....................................................................................... ...................................................................................... ................................................................. ............................................................................................. ...................................................................................... ................................................................. ............................................................................................ ................................................................................................. .............................................................................................. www.ti.com .................................................. ................................................ Copyright © 2010, Texas Instruments Incorporated ...

  • Page 9

    ... Programmable Soft Volume and Mute 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PurePath Digital is a trademark of Texas Instruments. 2 Matlab is a trademark of Math Works, Inc. 3 All other trademarks are the property of their respective owners ...

  • Page 10

    ... This enables the TAS5508C to provide an easy-to-use control interface with relaxed timing requirements. The TAS5508C can drive eight channels of H-bridge power stages. Texas Instruments H-bridge parts TAS5111, TAS5112, or TAS5182 with FETs are designed to work seamlessly with the TAS5508C. The TAS5508C supports both single-ended or bridge-tied load configurations ...

  • Page 11

    ... DVSS DVDD VRD_PLL VRA_PLL VBGAP AVDD_REF AVSS_PLL AVDD_PLL VR_PLL Figure 1-1. TAS5508C Functional Structure Copyright © 2010, Texas Instruments Incorporated Output Control 8 2 Crossbar Mixer 8 8 Crossbar Mixer DAP Control System Control Clock, PLL, and Serial Data I/F Submit Documentation Feedback ...

  • Page 12

    ... TAS5508C with the TAS5121 power stage. Note that each channel is normally dedicated to a particular function. 12 Introduction PWM AM T exas Instruments FM Digital Audio Amplifier T uner T AS5508C MPEG Decoder Front-Panel Controls Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Copyright © 2010, Texas Instruments Incorporated ...

  • Page 13

    ... Figure 1-3. Recommended TAS5508C and TAS5121 Channel Configuraton Copyright © 2010, Texas Instruments Incorporated TAS5508C Submit Documentation Feedback Product Folder Link(s): TAS5508C TAS5508C SLES257 – SEPTEMBER 2010 Introduction PWM 13 ...

  • Page 14

    ... TAS5508C SLES257 – SEPTEMBER 2010 14 Introduction PWM Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Copyright © 2010, Texas Instruments Incorporated ...

  • Page 15

    ... RESET 11 HP_SEL 12 PDN 13 MUTE 14 DVDD 15 DVSS 16 2.1.2 Ordering Information T A 0°C to 70°C Copyright © 2010, Texas Instruments Incorporated PAG PACKAGE (TOP VIEW PLASTIC 64-PIN PQFP (PN) Submit Documentation Feedback Product Folder Link(s): TAS5508C TAS5508C SLES257 – SEPTEMBER 2010 VR_PWM 48 PWM_P_4 47 46 ...

  • Page 16

    ... PWM 6 output (differential –) PWM 7 (lineout L) output (differential –) PWM 8 (lineout R) output (differential –) PWM 1 output (differential +) PWM 2 output (differential +) PWM 3 output (differential +) PWM 4 output (differential +) Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com DESCRIPTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 17

    ... TAS5508C Functional Description Figure 2-1 shows the TAS5508C functional structure. The following sections describe the TAS5508C functional blocks: • Power supply Copyright © 2010, Texas Instruments Incorporated (2) TERMINATION PWM 5 output (differential +) PWM 6 output (differential +) PWM 7 (lineout L) output (differential +) PWM 8 (lineout R) output (differential +) ...

  • Page 18

    ... The serial data input interface of the TAS5508C can be configured in right-justified, I modes. The serial data interface format is specified using the I supported formats and word lengths are shown in 18 Description 2 C data-interface control register. The Table 2-1. Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com left-justified Copyright © 2010, Texas Instruments Incorporated ...

  • Page 19

    ... TAS5508C Audio-Processing Configurations The 32-kHz to 96-kHz configuration supports eight channels of data processing that can be configured either as eight channels six channels with two channels for separate stereo line outputs. Copyright © 2010, Texas Instruments Incorporated Table 2-1. Serial Data Formats WORD LENGTH ...

  • Page 20

    ... I C program control. This feature enables coefficients for different sample rates to be stored in the TAS5508C and then selected when needed. 20 Description Table 2-2 Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com for a summary of TAS5508C Copyright © 2010, Texas Instruments Incorporated ...

  • Page 21

    ... Channels 3–7 are pass-through except for master volume control. Figure 2-3 shows TAS5508C detailed channel processing. The output mixer is 8×2 for channels 1–6 and 8×3 for channels 7 and 8. Copyright © 2010, Texas Instruments Incorporated 32 kHz–96 kHz LINEOUT FEATURE SET 8 ...

  • Page 22

    ... Max Vol Loud- OP Mixer 8 DAP 8 DRC2 2 ness (I C 0xB1) Volume (0x9D− (0x91− Output (0xD8) 0xA1) 0x95) Mixer B0014-01 Copyright © 2010, Texas Instruments Incorporated L to PWM1 R to PWM2 LS to PWM3 RS to PWM4 LBS to PWM5 RBS to PWM6 C to PWM7 Sub to PWM8 ...

  • Page 23

    ... SDIN3-L (LBS) ´ E Crossbar SDIN3-R (RBS) F Input Mixer SDIN4-L (C) G (1) H SDIN4-R (LFE) (1) Default inputs Figure 2-2. TAS5508C Architecture With I Copyright © 2010, Texas Instruments Incorporated Master Vol (0xD9) Bass and 4BQ DAP 1 Treble 1 (0x51– Volume (0xDA– 0x54) (0xD1) 0xDD) ...

  • Page 24

    ... Treble Inline DRC Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com DRC Output Gain Output Mixer Sums Any Two Channels PWM 32-Bit PWM Trunc Proc Output DRC 1 Other Channel Output From 7 Available B0016- bus Copyright © 2010, Texas Instruments Incorporated ...

  • Page 25

    ... Digit = hexadecimal digit Figure 2-6. Alignment of 5.23 Coefficient in 32-Bit I As Figure 2-6 shows, the hexadecimal (hex) value of the integer part of the gain coefficient cannot be Copyright © 2010, Texas Instruments Incorporated S_xxxx.xxxx_xxxx_xxxx_xxxx_xxxx_xxx Figure 2-4. 5.23 Format 0 −1 2 ...

  • Page 26

    ... Description Figure 2-7. Figure 2-7. 25.23 Format 22 0 −1 Bit 2 Bit 2 Bit bus to download a level or threshold coefficient into the Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com M0007-02 −23 2 Bit −1 − M0008- Word Copyright © 2010, Texas Instruments Incorporated ...

  • Page 27

    ... The TAS5508C advanced digital audio processor achieves both of these important performance capabilities by using a high-performance digital audio processing architecture with a 48-bit data path, 28-bit filter coefficients, and a 76-bit accumulator. Copyright © 2010, Texas Instruments Incorporated Sign Bit Integer ...

  • Page 28

    ... Figure 2-11. Input Crossbar Mixer Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Desired Output Values Retained by Overflow Bits Signal Bits Output Noise Floor as a Result of Additional Precision M0010-01 Figure 2-11. The control parameters SUM M0011-01 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 29

    ... For 176.4-kHz and 192-kHz data, the TAS5508C has two bass and treble tone controls. Each control has 2 a ±18- control range with selectable corner frequencies and second-order slopes. These controls operate two channel groups: Copyright © 2010, Texas Instruments Incorporated Magnitude ...

  • Page 30

    ... C command. The 2 C. lists the linear gain step sizes. 0.03125 0.015625 0.007813 0.003906 170.67 340.35 682.70 1365.4 21.33 42.67 85.33 170.67 2.67 5.33 10.67 21. interface. Two Copyright © 2010, Texas Instruments Incorporated ...

  • Page 31

    ... Any biquad filter response can be used to provide the desired loudness curve. The control parameters for the loudness control are programmable via the I interface. Copyright © 2010, Texas Instruments Incorporated from 110 ms. The increments of time are ...

  • Page 32

    ... Problem: Due to the Fletcher-Munson phenomena, we want to compensate for low-frequency attenuation near 60 Hz. The TAS5508C provides a loudness transfer function with EQ gain = 6, EQ center frequency = 60 Hz, and EQ bandwidth = 60 Hz. Solution: Using Texas Instruments ALE TAS5508C DSP tool, Matlab™, or other signal-processing tool, develop a loudness function with the parameters listed in 32 ...

  • Page 33

    ... DRC2 services only channel 8. This DRC also computes an rms estimate of the signal level on channel 8 and this estimate is used to compute the compression/expansion gain coefficient applied to the channel-8 audio stream. Copyright © 2010, Texas Instruments Incorporated USAGE DATA ...

  • Page 34

    ... If the user wants to implement other DRC functions, Texas Instruments recommends using the automatic loudspeaker equalization (ALE) tool available from Texas Instruments. The ALE tool allows the user to select the DRC transfer function graphically. It then outputs the TAS5508C hex coefficients for download to the TAS5508C. ...

  • Page 35

    ... DAP. The 32-bit samples input into the DRC are placed in the upper 32 bits of this 48-bit word space. This means that the threshold settings must be programmed as 48-bit (25.23 format) numbers. Zero-valued and positive-valued threshold settings are not allowed and cause unpredictable behavior if used. Copyright © 2010, Texas Instruments Incorporated Region Region 1 ...

  • Page 36

    ... Both thresholds are set in logarithmic space, and which region is active for any given rms estimator output sample is determined by the logarithmic value of the sample. 36 Description * window F n n(1 * aa) S Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com * n(1 * ad) S Copyright © 2010, Texas Instruments Incorporated ...

  • Page 37

    ... Offsets are 25.23-formatted 48-bit logarithmic numbers. They are computed by the following equation. Gains or boosts are represented as negative numbers; cuts or attenuations are represented as positive numbers. For example, to achieve a boost threshold T1, the I O1 must be: Copyright © 2010, Texas Instruments Incorporated + | For ( | –6.0206T INPUT ...

  • Page 38

    ... I C interface. 38 Description + – 24.0824 dB + 0.51197555 6.0206 + 0.1000_0011_0001_1101_0100 + 0x00000041886A in 25.23 format 0 compression å 0 expansion å Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com means –1 < k < 0 for n > 1. Thus å *0.3333 : 1 compression 3 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 39

    ... The PWM section has individual channel dc blocking filters that can be enabled and disabled. The filter cutoff frequency is less than 1 Hz. The PWM section has individual channel de-emphasis filters for 32, 44.1, and 48 kHz that can be enabled and disabled. Copyright © 2010, Texas Instruments Incorporated Gain Coefficient 28 48 ...

  • Page 40

    ... C interface. 3.18 (50 s) 10.6 ( – Frequency – kHz show how power-supply and digital gains can be used together. Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Figure 2-19 shows a graph of the De-emphasis M0015- When enabled, Copyright © 2010, Texas Instruments Incorporated ...

  • Page 41

    ... Figure 2-21. Power-Supply and Digital Gains (Linear Space) 2.12.4 AM Interference Avoidance Digital amplifiers can degrade AM reception as a result of their RF emissions. Texas Instruments' patented AM interference-avoidance circuit provides a flexible system solution for a wide variety of digital audio architectures. During AM reception, the TAS5508C adjusts the radiated emissions to provide an emission-clear zone for the tuned AM frequency ...

  • Page 42

    ... The Digital Receiver or the Audio DSP Provides the Master and Bit Clocks Interference-Avoidance Circuit Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 TAS5111 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 43

    ... C and serial data bus operations are ignored. Table 3-1 shows the device output signals while RESET is active. SIGNAL Valid PWM P-outputs PWM M-outputs Copyright © 2010, Texas Instruments Incorporated Section 6 and Section 7. Table 3-1. Device Outputs During Reset SIGNAL STATE Low (M-state) ...

  • Page 44

    ... Channel N -> Output N, no attenuation Gain of 0 Gain of 0 Gain of 1 Gain of 0 Gain of 1 Gain of 0 DRC disabled, default values Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Table 3-2 shows the default control Copyright © 2010, Texas Instruments Incorporated ...

  • Page 45

    ... PWM stop. A quiet stop sequence can be performed by first applying MUTE before PDN. When PDN is released, the system goes to the end state specified by MUTE and BKND_ERR pins and 2 the I C register settings. Copyright © 2010, Texas Instruments Incorporated Mute 0 dB 0x12 neutral Filter set 3 Filter set 3 ...

  • Page 46

    ... M-state – low M-state – low SDA Signal input (not driven) Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Section 2.12. Once the back-end error Table 3-4 shows the 2 C register and the MUTE terminal are Copyright © 2010, Texas Instruments Incorporated ...

  • Page 47

    ... This bit is normally used together with D2. For some power stages, both PWM signals must be high to get the desired operation of both speaker outputs to be low. This bit sets the PWM outputs high-high during mute. D0 Not used Copyright © 2010, Texas Instruments Incorporated 2 C mute, the AM interference mute sequence, the DESCRIPTION ...

  • Page 48

    ... SLES257 – SEPTEMBER 2010 Table 3-6 lists the optimal setting for each output-stage configuration. Note that the default value is applicable in all configurations except the TAS5182 SE/BTL configuration. Table 3-6. Recommended TAS5508C Configurations for Texas Instruments Power Stages DEVICE ERROR RECOVERY RES ...

  • Page 49

    ... In quad speed, the update is 1 step every 16/Fs seconds. Because of processor loading, the update rate can increase for some increments by 1/Fs to 3/Fs. However, the variance of the total time to go from mute is less than 25%. Copyright © 2010, Texas Instruments Incorporated D31–D4 D3 ...

  • Page 50

    ... This is also the default setting of the TAS5508C. Default settings can be changed in the modulation index register (0x16). Note that no change should be made to this register when using Texas Instruments power stages. 3.3.8 Interchannel Delay An 8-bit value can be programmed into each of the eight PWM interchannel delay registers to add a delay per channel from 0 to 255 clock cycles ...

  • Page 51

    ... If bank switching is used and bank 2 and bank 3 are not programmed correctly, then the output of the TAS5508C could be muted when switching to those banks. Copyright © 2010, Texas Instruments Incorporated 2 C parameter ...

  • Page 52

    ... After a bank switch is initiated (manual or automatic minimum of 186 ms. This value is determined by the volume ramp rates for a particular sample rate. 52 TAS5508C Controls and Status 2 C writes to the TAS5508C should occur before Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Copyright © 2010, Texas Instruments Incorporated ...

  • Page 53

    ... C registers with appropriate values for bank 3. (g) Select automatic bank switching (write 0x0003 F00C to register 0x40). 3. When the audio media changes, the TAS5508C automatically detects the incoming sample rate and automatically switches to the appropriate bank. Copyright © 2010, Texas Instruments Incorporated 2 C firmware. Submit Documentation Feedback ...

  • Page 54

    ... TAS5508C SLES257 – SEPTEMBER 2010 54 TAS5508C Controls and Status Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Copyright © 2010, Texas Instruments Incorporated ...

  • Page 55

    ... T Operating ambient-air temperature range A T Operating junction temperature range J (1) 5-V tolerant inputs are RESET, PDN, MUTE, HP_SEL, SCLK, LRCLK, MCLK, SDIN1, SDIN2, SDIN3, SDIN4, SDA, and SCL. Copyright © 2010, Texas Instruments Incorporated (1) digital input (3) > 1 > 1 DERATING FACTOR ABOVE T = 25° ...

  • Page 56

    ... V 0.5 ±20 mA ±1 ±1 mA ±1 ±1 ±1 mA ±20 140 150 mA 155 MODE VALUE UNIT 384 kHz 352.8 kHz 384 kHz (1) MIN TYP MAX UNIT 13.5 MHz 2 50 MHz 40% 50% 60 MCLKs 100 200 Ω 100 nF Copyright © 2010, Texas Instruments Incorporated ...

  • Page 57

    ... LRCLK clock edge with respect to the falling edge of SCLK SCLK (Input) LRCLK (Input) SDIN1 SDIN2 SDIN3 Figure 4-1. Slave Mode Serial Data Interface Timing Copyright © 2010, Texas Instruments Incorporated TEST CONDITIONS pF,SCLK = 64 × su1 Submit Documentation Feedback Product Folder Link(s): ...

  • Page 58

    ... Figure 4-2. SCL and SDA Timing su2 su3 Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com MIN MAX 400 0.6 1.3 300 300 100 0 1.3 0.6 0.6 0.6 400 T0027-01 t (buf) Stop Condition T0028-01 Copyright © 2010, Texas Instruments Incorporated UNIT kHz ...

  • Page 59

    ... Number of MCLKs preceding the release of PDN t Device start-up time su PDN M-State t < 300 s m p(DMSTATE) Copyright © 2010, Texas Instruments Incorporated PARAMETER Figure 4-4. Reset Timing PARAMETER t su Figure 4-5. Power-Down Timing Submit Documentation Feedback Product Folder Link(s): TAS5508C TAS5508C SLES257 – ...

  • Page 60

    ... Figure 4-7. Mute Timing Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com MIN TYP MAX UNIT 350 None ns <100 ms – interval Normal Operation T0031-01 MIN TYP MAX UNIT (1) Defined by rate setting ms Normal Operation t d(VOL) T0032-01 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 61

    ... Switchover time (SW) (1) See the Volume Treble and Base Slew Rate Register (0xD0) , HP_SEL Spkr Volume HP Volume M-State (Internal Device State) HP_SEL HP Volume Spkr Volume M-State Copyright © 2010, Texas Instruments Incorporated Defined by rate setting Section 7.29. t d(VOL) t (SW) t d(VOL) t (SW) Figure 4-8 ...

  • Page 62

    ... PSVC range = 24 dB SCLK LSB MSB Figure 4- 64-Fs Format Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com MIN MAX UNIT –127 12, 18 Single sided 2048 Steps 6% 95% dB (120 : 2048) (1944 : 2048) 32 Clks Right Channel LSB T0034-01 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 63

    ... Clks LRCLK Left Channel SCLK MSB 24-Bit Mode 20-Bit Mode 16-Bit Mode Copyright © 2010, Texas Instruments Incorporated SCLK LSB MSB Figure 4-10. Left-Justified 64-Fs Format Submit Documentation Feedback Product Folder Link(s): TAS5508C TAS5508C SLES257 – SEPTEMBER 2010 32 Clks Right Channel 8 ...

  • Page 64

    ... LRCLK Left Channel SCLK MSB 24-Bit Mode 20-Bit Mode 19 18 16-Bit Mode Figure 4-11. Right-Justified 64-Fs Format 64 Electrical Specifications SCLK LSB MSB Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com 32 Clks Right Channel LSB T0034-03 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 65

    ... During multiple-byte read operations, the TAS5508C responds with data, a byte at a time, starting at the subaddress assigned, as long as the master device continues to respond with acknowledges particular subaddress does not contain 32 bits, the unused bits are read as logic 0. Copyright © 2010, Texas Instruments Incorporated 2 C interface that is compatible with the Inter-IC (I ...

  • Page 66

    ... Product Folder Link(s): TAS5508C www.ti.com 2 C addressing. The 2 Acknowledge ACK Data Byte Condition Figure 5-3. After receiving each Acknowledge Acknowledge ACK D7 D0 ACK D7 D0 ACK Other Data Bytes Last Data Byte Condition Copyright © 2010, Texas Instruments Incorporated C write Stop T0481-01 Stop T0482-01 ...

  • Page 67

    ... After receiving the data byte, the master device transmits a not acknowledge followed by a stop condition to complete the single-byte, data-read transfer. Start Condition Acknowledge R/W ACK Device Address and Read/Write Bit Copyright © 2010, Texas Instruments Incorporated 2 C write operations to be broken up into multiple data Repeat Start Condition Acknowledge ACK A6 A5 ...

  • Page 68

    ... Figure 5-5. Multiple-Byte Read Transfer Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Figure 5-5. Except for the last Not Acknowledge Acknowledge Acknowledge D0 ACK D7 D0 ACK D7 D0 ACK Other Data Bytes Last Data Byte Stop Condition T0484-01 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 69

    ... Channel offset register 0x24–0x3F 0x40 4 Bank-switching command register Copyright © 2010, Texas Instruments Incorporated DESCRIPTION OF CONTENTS Set data rate and MCLK frequency kHz 2. MCLK = 256 Fs = 12.288 MHz Clip indicator and ID code for the 0x01 TAS5508C PLL, SCLK, LRCLK, and frame slip ...

  • Page 70

    ... DRC2 threshold (T1) – lower 4 bytes 0x0B, 0x20, 0xE2, 0xB2 DRC2 threshold (T2) – upper 2 bytes 0x00, 0x00, 0x00, 0x00 DRC2 threshold (T2) – lower 4 bytes 0x06, 0xF9, 0xDE, 0x58 Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com DEFAULT STATE Copyright © 2010, Texas Instruments Incorporated ...

  • Page 71

    ... Ch6 volume 0xD7 4 Ch7 volume 0xD8 4 Ch8 volume Copyright © 2010, Texas Instruments Incorporated DESCRIPTION OF CONTENTS DRC2 slope (k0) 0x00, 0x40, 0x00, 0x00 DRC2 slope (k1) 0x0F, 0xC0, 0x00, 0x00 DRC2 slope (k2) 0x0F, 0x90, 0x00, 0x00 DRC2 offset (O1) – upper 2 bytes 0x00, 0x00, 0xFF, 0xFF DRC2 offset (O1) – ...

  • Page 72

    ... Use BCD-tuned frequency Set PSVC control range 12-dB control range 6- or 8-channel configuration, PSVC 8-channel configuration enable Power-supply volume control disabled Reserved Special register N/A Reserved Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com DEFAULT STATE Copyright © 2010, Texas Instruments Incorporated ...

  • Page 73

    ... D3 1 – – – – – 1 – – – – – Copyright © 2010, Texas Instruments Incorporated 2 C register default values are in bold font – – 32-kHz data rate – – 38-kHz data rate – – 44.1-kHz data rate – – ...

  • Page 74

    ... Unmute threshold 6 dB over input threshold – – Unmute threshold equal to input threshold de-emphasis 0 1 De-emphasis for kHz 1 0 De-emphasis for Fs = 44.1 kHz 1 1 De-emphasis for kHz Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION Function Function Copyright © 2010, Texas Instruments Incorporated ...

  • Page 75

    ... Serial Data Interface Control Register (0x0E) Nine serial modes can be programmed via the I Table 7-8. Serial Data Interface Control Register Format RECEIVE SERIAL DATA INTERFACE FORMAT Right-justified Right-justified Right-justified Copyright © 2010, Texas Instruments Incorporated – – Disable back-end reset sequence for a channel – BEErrorRecEn – ...

  • Page 76

    ... Soft mute channel 5 – – – – Soft mute channel 6 – – – – Soft mute channel 7 – – – – Soft mute channel Unmute All Channels Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 77

    ... Copyright © 2010, Texas Instruments Incorporated Set input automute and PWM automute delay Set input automute and PWM automute delay Set input automute and PWM automute delay Set input automute and PWM automute delay Set input automute and PWM automute delay ...

  • Page 78

    ... Set back-end reset period Set back-end reset period Set back-end reset period Set back-end reset period Set back-end reset period Set back-end reset period 10 ms Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 79

    ... Channel Offset Register (0x23) The channel offset register is mapped into 0x23. Table 7-14. Channel Offset Register Format Copyright © 2010, Texas Instruments Incorporated LIMIT [DCLKs Minimum absolute delay, 0 DCLK cycles, default for channel 1 Maximum positive delay, 31 × 4 DCLK cycles Maximum negative delay, –32 × 4 DCLK cycles Default value for channel 1 = – ...

  • Page 80

    ... Default Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 81

    ... E_to_ipmix[3] F_to_ipmix[3] G_to_ipmix[3] H_to_ipmix[3] Copyright © 2010, Texas Instruments Incorporated DESCRIPTION OF CONTENTS SDIN1-left (Ch1 input mixer 1 coefficient (default = 1) u[31:28], A_1[27:24], A_1[23:16], A_1[15:8], A_1[7:0] SDIN1-right (Ch2 input mixer 1 coefficient (default = 0) u[31:28], B_1[27:24], B_1[23:16], B_1[15:8], B_1[7:0] SDIN2-left (Ch3 input mixer 1 coefficient (default = 0) ...

  • Page 82

    ... Copyright © 2010, Texas Instruments Incorporated ...

  • Page 83

    ... E_to_ipmix[8] F_to_ipmix[8] G_to_ipmix[8] H_to_ipmix[8] Copyright © 2010, Texas Instruments Incorporated DESCRIPTION OF CONTENTS SDIN1-left (Ch1 input mixer 7 coefficient (default = 0) u[31:28], A_7[27:24], A_7[23:16], A_7[15:8], A_7[7:0] SDIN1-right (Ch2 input mixer 7 coefficient (default = 0) u[31:28], B_7[27:24], B_7[23:16], B_7[15:8], B_7[7:0] SDIN2-left (Ch3 input mixer 7 coefficient (default = 0) ...

  • Page 84

    ... DEFAULT STATE See Table 7-19 See Table 7-19 See Table 7-19 See Table 7-19 See Table 7-19 See Table 7-19 See Table 7-19 See Table 7-19 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 85

    ... Loudness biquad (b 2 Loudness biquad (a 1 Loudness biquad (a 2 Copyright © 2010, Texas Instruments Incorporated CONTENTS Table 7-21. Loudness Register Format DESCRIPTION OF CONTENTS u[31:28], LG[27:24], LG[23:16], LG[15:8], LG[7:0] u[31:24], u[23:16], LO[15:8], LO[7:0] LO[31:24], LO[23:16], LO[15:8], LO[7:0] u[31:28], G[27:24], G[23:16], G[15:8], G[7:0] ...

  • Page 86

    ... Channel 6 (node p): No DRC – Channel 7 (node q): No DRC – Channel 7 (node q): Pre-volume DRC – Channel 7 (node q): Post-volume DRC – Channel 7 (node q): No DRC Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 87

    ... Channel and 7 DRC1 decay Channel and 7 DRC1 (1 – decay) Copyright © 2010, Texas Instruments Incorporated FUNCTION Table 7-24. DRC1 Data Register Format DESCRIPTION OF CONTENTS u[31:28], E[27:24], E[23:16], E[15:8], E[7:0] u[31:28], 1–E[27:24], 1–E[23:16], 1–E[15:8], 1–E[7:0] u[31:24], u[23:16], T1[15:8], T1[7:0] ...

  • Page 88

    ... INITIALIZATION VALUE 0x00, 0x80, 0x00, 0x00 0x00, 0x00, 0x00, 0x00 Copyright © 2010, Texas Instruments Incorporated ...

  • Page 89

    ... G4 G3 7.27 8×3 Output Mixer Registers (0xB0–0xB1) Output mixers for channels 7 and 8 map to registers 0xB0 and 0xB1, respectively. Total data per register is 12 bytes. Copyright © 2010, Texas Instruments Incorporated D26 D25 D24 Select channel 1 to output mixer Select channel 2 to output mixer ...

  • Page 90

    ... Select channel 1 to output mixer Select channel 2 to output mixer Select channel 3 to output mixer Select channel 4 to output mixer Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 91

    ... Copyright © 2010, Texas Instruments Incorporated D26 D25 D24 Select channel 5 to output mixer Select channel 6 to output mixer Select channel 7 to output mixer Select channel 8 to output mixer ...

  • Page 92

    ... Maximum rate – Updates every 5.08 ms (every 255 LRCLKs at 48 kHz) Table 7-35. Volume Register Format D26 D25 D24 Unused bits D18 D17 D16 Unused bits D10 D9 D8 V10 V9 V8 Volume Volume Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 93

    ... Copyright © 2010, Texas Instruments Incorporated GAIN/INDEX EXPECTED 17.75 17.81 17.5 17.56 17.25 17.31 17 17.06 16.75 16.81 16.5 16.56 16.25 16.31 16 16.05 15 ...

  • Page 94

    ... Bass filter set Reserved Reserved D10 change Bass filter set Bass filter set Bass filter set Bass filter set Bass filter set Reserved Reserved Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 95

    ... Bass filter index (BFI) BASS INDEX VALUE 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 Copyright © 2010, Texas Instruments Incorporated change Bass filter set Bass filter set Bass filter set ...

  • Page 96

    ... Treble filter set Treble filter set Treble filter set Treble filter set Treble filter set Reserved Reserved change Treble filter set Treble filter set 2 Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 97

    ... AM Mode Register (0xDE) Bits D31–D21 are Don't Care. D31 D30 D29 D28 D27 Copyright © 2010, Texas Instruments Incorporated Treble filter set Treble filter set Treble filter set ...

  • Page 98

    ... BCD frequency (1s kHz Default value D10 D9 D8 B10 B9 B8 Binary frequency (upper 3 bits Default value Binary frequency (lower 8 bits Default value Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION FUNCTION Copyright © 2010, Texas Instruments Incorporated ...

  • Page 99

    ... Incremental Multiple-Write Append Register (0xFE) This is a special register used to append data to a previously opened register. Copyright © 2010, Texas Instruments Incorporated FUNCTION FUNCTION 8-channel configuration 6-channel configuration Power-supply volume control disabled Power-supply volume control enabled Subwoofer part of PSVC ...

  • Page 100

    ... TAS5508C SLES257 – SEPTEMBER 2010 100 Serial-Control Interface Register Definitions Submit Documentation Feedback Product Folder Link(s): TAS5508C www.ti.com Copyright © 2010, Texas Instruments Incorporated ...

  • Page 101

    ... TAS5508C Example Application Schematic The following page contains an example application schematic for the TAS5508C. Copyright © 2010, Texas Instruments Incorporated TAS5508C Example Application Schematic Submit Documentation Feedback Product Folder Link(s): TAS5508C TAS5508C SLES257 – SEPTEMBER 2010 101 ...

  • Page 102

    Phono socket J950 LINE OUTPUT Phono socket J951 GND J900 4 3 HEADPHONE OUTPUT 2 1 Mini-Jack (3.5mm) C C10 R10 R11 10nF 200R 200R C11 C12 100nF ...

  • Page 103

    ... Orderable Device (1) Package Type Package Status TAS5508CPAG ACTIVE TQFP TAS5508CPAGR ACTIVE TQFP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. ...

  • Page 104

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TAS5508CPAGR TQFP PAG PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 64 1500 330.0 24.4 13.0 Pack Materials-Page 1 21-Sep-2010 Pin1 (mm) (mm) (mm) (mm) Quadrant 13.0 1.5 16 ...

  • Page 105

    ... Device Package Type TAS5508CPAGR TQFP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) PAG 64 1500 Pack Materials-Page 2 21-Sep-2010 Width (mm) Height (mm) 346.0 346.0 41.0 ...

  • Page 106

    PAG (S-PQFP-G64) 0, 7,50 TYP 10,20 SQ 9,80 12,20 SQ 11,80 1,05 0,95 1,20 MAX NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC ...

  • Page 107

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...