TV04A240J-G

Manufacturer Part NumberTV04A240J-G
DescriptionTVS Diodes - Transient Voltage Suppressors TVS, UNI-DIRECTIONAL 400W 24V 5%
ManufacturerComchip Technology
TV04A240J-G datasheet
 


Specifications of TV04A240J-G

Lead Free Status / RoHS StatusLead free / RoHS Compliant  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Page 1/45

Download datasheet (2Mb)Embed
Next
Am29F800B
Data Sheet
Am29F800B Cover Sheet
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been
made are the result of normal data sheet improvement and are noted in the document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 21504
Revision E
Amendment 8
Issue Date November 17, 2009

TV04A240J-G Summary of contents

  • Page 1

    Am29F800B Data Sheet The following document contains information on Spansion memory products. Continuity of Specifications There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been made ...

  • Page 2

    This page left intentionally blank Am29F800B 21504_E8 November 17, 2009 ...

  • Page 3

    DATA SHEET Am29F800B 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ■ Single power supply operation — 5.0 Volt-only operation for read, erase, and program operations — Minimizes system level ...

  • Page 4

    GENERAL DESCRIPTION The Am29F800B Mbit, 5.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 44-pin SO, 48-pin TSOP, and 48-ball FBGA packages. The device is also available in Known Good ...

  • Page 5

    TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . ...

  • Page 6

    PRODUCT SELECTOR GUIDE Family Part Number Speed Option V = 5.0 V ± 10% CC Max access time ACC Max CE# access time Max OE# access time Note: See ...

  • Page 7

    CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21631 for more information. A15 1 A14 2 A13 3 A12 4 A11 5 6 A10 ...

  • Page 8

    CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21631 for more information A13 A12 WE# RESET RY/BY ...

  • Page 9

    PIN CONFIGURATION A0–A18 = 19 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...

  • Page 10

    ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am29F800B T - DEVICE NUMBER/DESCRIPTION Am29F800B 8 Megabit (1 ...

  • Page 11

    DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register it- self does not occupy any addressable memory loca- tion. The register is composed ...

  • Page 12

    After the system writes the autoselect command se- quence, the device enters the autoselect mode. The system can then read autoselect codes ...

  • Page 13

    Table 2. Am29F800BT Top Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 ...

  • Page 14

    Table 3. Am29F800BB Bottom Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 ...

  • Page 15

    Table 4. Am29F800B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29F800B Byte L (Top Boot Block) Device ID: Word L Am29F800B Byte L (Bottom Boot Block) Sector Protection Verification L L ...

  • Page 16

    Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to the Command Defi- nitions table). In addition, the following hardware data protection measures prevent accidental erasure or pro- ...

  • Page 17

    Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is protected. The Command Definitions table shows the address and data requirements. This method is ...

  • Page 18

    Any commands written to the chip during the Embed- ded Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the ...

  • Page 19

    DQ6 status bits, just as in the standard program oper- ation. See “Write Operation Status” for more informa- tion. The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows ...

  • Page 20

    Command Definitions Table 5. Am29F800B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...

  • Page 21

    WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and ...

  • Page 22

    RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

  • Page 23

    The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to ...

  • Page 24

    Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate ...

  • Page 25

    ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . .–65° +150° C Ambient Temperature with Power Applied ...

  • Page 26

    DC CHARACTERISTICS TTL/NMOS Compatible Parameter Description I Input Load Current LI I A9, OE#, RESET Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I ...

  • Page 27

    DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current LI A9, OE#, RESET Input Load I LIT Current I Output Leakage Current LO V Active Read Current CC I CC1 (Note 2) V Active Write Current CC I CC2 ...

  • Page 28

    TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalents. Figure 8. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted Table ...

  • Page 29

    AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

  • Page 30

    AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

  • Page 31

    AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

  • Page 32

    AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

  • Page 33

    AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device in word ...

  • Page 34

    AC CHARACTERISTICS t WC Addresses 2AAh CE Data RY/BY# t VCS V CC Note Sector Address Valid Address for reading status data. Figure 14. Chip/Sector Erase Operation Timings 32 ...

  • Page 35

    AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

  • Page 36

    AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# or CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within the erase-suspended sector. Temporary Sector ...

  • Page 37

    AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

  • Page 38

    AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes Program Address Program Data Sector Address, DQ7# = Complement ...

  • Page 39

    ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time (Note 2) Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 2) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 ...

  • Page 40

    PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package Am29F800B Dwg rev AC; 10/99 21504E8 November 17, 2009 ...

  • Page 41

    PHYSICAL DIMENSIONS (continued) TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP) November 17, 2009 21504E8 Am29F800B Dwg rev AA; 10/99 39 ...

  • Page 42

    PHYSICAL DIMENSIONS (continued) FBB048—48-Ball Fine-Pitch Ball Grid Array (FBGA package Am29F800B Dwg rev AF; 10/99 21504E8 November 17, 2009 ...

  • Page 43

    REVISION SUMMARY Revision A (August 1997) Initial release. Revision B (October 1997) Global Added -55 speed option. Changed data sheet designa- tion from Advance Information to Preliminary. Sector Protection/Unprotection Corrected text to indicate that these functions can only be implemented ...

  • Page 44

    REVISION SUMMARY (Continued) Revision D (January 1999) Distinctive Characteristics Added the 20-year data retention subbullet. Ordering Information Optional Processing: Deleted “B = Burn-in”. DC Characteristics—TTL/NMOS Compatible I : Added OE# and RESET to the Description column. LIT Changed “A9 = ...

  • Page 45

    Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated ...