MOSFET 2P-CH 15V 1.17A 8-SOIC

 

TPS1120DR

Manufacturer Part NumberTPS1120DR
DescriptionMOSFET 2P-CH 15V 1.17A 8-SOIC
ManufacturerTexas Instruments
TPS1120DR datasheets

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Specifications of TPS1120DR

Fet Type2 P-Channel (Dual)Fet FeatureLogic Level Gate
Rds On (max) @ Id, Vgs180 mOhm @ 1.5A, 10VDrain To Source Voltage (vdss)15V
Current - Continuous Drain (id) @ 25° C1.17AVgs(th) (max) @ Id1.5V @ 250µA
Gate Charge (qg) @ Vgs5.45nC @ 10VPower - Max840mW
Mounting TypeSurface MountPackage / Case8-SOIC (3.9mm Width)
ConfigurationDual Dual DrainTransistor PolarityP-Channel
Resistance Drain-source Rds (on)0.4 Ohm @ 4.5 VDrain-source Breakdown Voltage15 V
Gate-source Breakdown Voltage- 15 V or 2 VContinuous Drain Current1.17 A
Power Dissipation840 mWMaximum Operating Temperature+ 125 C
Mounting StyleSMD/SMTMinimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-1352-2
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D
Low r
. . . 0.18
at V
DS(on)
GS
D
3-V Compatible
D
Requires No External V
CC
D
TTL and CMOS Compatible Inputs
D
V
= – 1.5 V Max
GS(th)
D
ESD Protection Up to 2 kV per
MIL-STD-883C, Method 3015
description
The TPS1120 incorporates two independent
p-channel enhancement-mode MOSFETs that
have been optimized, by means of the Texas
Instruments LinBiCMOS process, for 3-V or 5-V
power distribution in battery-powered systems. With a maximum V
the TPS1120 is the ideal high-side switch for low-voltage portable battery-management systems, where
maximizing battery life is a primary concern. Because portable equipment is potentially subject to electrostatic
discharge (ESD), the MOSFETs have built-in circuitry for 2-kV ESD protection. End equipment for the TPS1120
includes notebook computers, personal digital assistants (PDAs), cellular telephones, bar-code scanners, and
PCMCIA cards. For existing designs, the TPS1120D has a pinout common with other p-channel MOSFETs in
small-outline integrated circuit SOIC packages.
The TPS1120 is characterized for an operating junction temperature range, T
T J
– 40 C to 150 C
† The D package is available taped and reeled. Add an R suffix to device
type (e.g., TPS1120DR). The chip form is tested at 25 C.
Caution. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic
fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to
MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than
maximum-rated voltages to these high-impedance circuits.
LinBiCMS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS
SLVS080A – MARCH 1994 – REVISED AUGUST 1995
= – 10 V
1SOURCE
1GATE
2SOURCE
2GATE
GS(th)
AVAILABLE OPTIONS
PACKAGED DEVICES †
CHIP FORM
CHIP FORM
SMALL OUTLINE
(D)
TPS1120D
TPS1120Y
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS1120, TPS1120Y
D PACKAGE
(TOP VIEW)
1DRAIN
1
8
1DRAIN
2
7
2DRAIN
3
6
2DRAIN
4
5
of – 1.5 V and an I
of only 0.5 A,
DSS
, from – 40 C to 150 C.
J
(Y)
Copyright
1995, Texas Instruments Incorporated
1

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TPS1120DR Summary of contents

  • Page 1

    ... C to 150 C † The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS1120DR). The chip form is tested Caution. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD according to MIL-STD-883C, Method 3015 ...

  • Page 2

    TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 schematic 1SOURCE ESD- Protection Circuitry 1GATE † For all applications, both drain pins for each device should be connected. TPS1120Y chip information This chip, when properly ...

  • Page 3

    Drain-to-source voltage Gate-to-source voltage Continuous drain current each device ( 150 Continuous drain current, each device ( 150 C), ...

  • Page 4

    TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 electrical characteristics (unless otherwise noted) J static PARAMETER PARAMETER V GS(th) Gate-to-source threshold voltage Source-to-drain voltage (diode forward voltage) † V ...

  • Page 5

    PARAMETER MEASUREMENT INFORMATION – DUT Figure 1. Switching-Time Test Circuit POST OFFICE BOX 655303 DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 V GS 90% ...

  • Page 6

    TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 Drain current Drain current Static drain-to-source on-state resistance Capacitance Static drain-to-source on-state resistance (normalized) Source-to-drain diode current Static drain-to-source on-state resistance Gate-to-source threshold voltage Gate-to-source voltage ...

  • Page 7

    TYPICAL CHARACTERISTICS STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE vs DRAIN CURRENT 0 0 – 2 – 0 – 4 ...

  • Page 8

    TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE vs GATE-TO-SOURCE VOLTAGE 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 – 1 – 3 – 5 – 7 – ...

  • Page 9

    DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS THERMAL INFORMATION DRAIN CURRENT vs DRAIN-TO-SOURCE VOLTAGE – 10 Single Pulse See Note A – 1 – 0 150 – 0.001 – 0.1 – 1 – 10 ...

  • Page 10

    TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS080A – MARCH 1994 – REVISED AUGUST 1995 The profile of the heat sinks used for thermal measurements is shown in Figure 14. Board type is FR4 with 1-oz copper and 1-oz tin/lead (63/37) ...

  • Page 11

    Figure 16 illustrates the thermally enhanced (SO) lead frame. Attaching the two MOSFET dies directly to the source terminals allows maximum heat transfer into a power plane. Lead 1 1SOURCE Lead 2 1GATE Lead 3 2SOURCE 2GATE Lead 4 Figure ...

  • Page 12

    ... TPS1120D ACTIVE TPS1120DG4 ACTIVE TPS1120DR ACTIVE TPS1120DRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...

  • Page 13

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TPS1120DR SOIC D PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 (mm) Diameter Width (mm) W1 (mm) 8 2500 330.0 12.4 6.4 Pack Materials-Page 1 11-Mar-2008 B0 (mm) K0 (mm Pin1 (mm) (mm) Quadrant 5.2 2 ...

  • Page 14

    ... Device Package Type TPS1120DR SOIC PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 2500 Pack Materials-Page 2 11-Mar-2008 Width (mm) Height (mm) 346.0 346.0 29.0 ...

  • Page 15

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...

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