WM8940GEFL/V Wolfson Microelectronics, WM8940GEFL/V Datasheet - Page 48

• Manufacturer Part Number: WM8940GEFL/V
• Description: Audio CODECs Mono CODEC with Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8940GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-24
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8940
w
OUTPUT SWITCH
Table 39 Disabled Outputs to VREF Resistance
Table 40 Unused Output Pin Tie-off Options
A dedicated buffer is available for tying off unused analogue I/O pins as shown in Figure 21. This
buffer can be enabled using the BUFIOEN register bit.
Table 40 summarises the tie-off options for the speaker and mono output pins.
When the device is configured with a 2-wire interface the CSB/GPIO pin can be used as a switch
control input to automatically disable the speaker outputs and enable the mono output. As an
example when a line is plugged into a jack socket. In this mode, enabled by setting GPIOSEL=001,
pin CSB/GPIO switches between mono and speaker outputs (e.g. when pin 12 is connected to a
mechanical switch in the headphone socket to detect plug-in). The GPIOPOL bit reverses the
polarity of the CSB/GPIO input pin.
Note that the speaker outputs and the mono output must be enabled for this function to work (see
Table 41). The CSB/GPIO pin has an internal de-bounce circuit when in this mode in order to
prevent the output enables from toggling multiple times due to input glitches. This de-bounce circuit
is clocked from a slow clock with period 2
Figure 21 Unused Input/Output Pin Tie-off Buffers
R49
SPKN/PEN
MONOEN/
REGISTER
ADDRESS
0
0
1
0
BIT
VROI
X
0
1
VROI
LABEL
Output enabled (DC level=AVDD/2)
OUTPUT CONFIGURATION
30kΩ tieoff to AVDD/2
21
1kΩ tieoff to AVDD/2
0
x MCLK, enabled using the SLOWCLKEN register bit.
DEFAULT
VREF (AVDD/2) to analogue output
resistance
0: approx 1kΩ
1: approx 30 kΩ
DESCRIPTION
PD, Rev 4.2, April 2008
Production Data
48