WM8976GEFL/V Wolfson Microelectronics, WM8976GEFL/V Datasheet - Page 73

• Manufacturer Part Number: WM8976GEFL/V
• Description: Audio CODECs Mono ADC Stereo DAC with Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8976GEFL/V

• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
Table 59 PLL Frequency Examples
COMPANDING
w
(MHz)
MCLK
19.68
19.68
14.4
14.4
19.2
19.2
19.8
19.8
(F1)
12
12
13
13
24
24
26
26
27
27
DESIRED
OUTPUT
12.288
12.288
12.288
12.288
12.288
12.288
12.288
12.288
12.288
(MHz)
11.29
11.29
11.29
11.29
11.29
11.29
11.29
11.29
11.29
Table 58 PLL Frequency Ratio Control
LOOPBACK
The PLL performs best when f
are shown in Table 59.
Setting the LOOPBACK register bit enables digital loopback. When this bit is set the output data
from the ADC audio interface is fed directly into the DAC data input.
The WM8976 supports A-law and μ-law and companding and linear mode on both transmit (ADC)
and receive (DAC) sides. Companding can be enabled on the DAC or ADC audio interfaces by
writing the appropriate value to the DAC_COMP or ADC_COMP register bits respectively.
R39
PLL K Value
3
90.3168
90.3168
90.3168
90.3168
90.3168
90.3168
90.3168
90.3168
90.3168
98.304
98.304
98.304
98.304
98.304
98.304
98.304
98.304
98.304
(MHz)
F2
8:0
PRESCALE
DIVIDE
PLLK [8:0]
2
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
is around 90MHz. Its stability peaks at N=8. Some example settings
POSTSCALE
DIVIDE
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0E9h
6.947446
7.561846
6.826667
9.178537
9.990243
9.122909
9.929697
6.947446
7.561846
6.690133
7.281778
7.5264
7.5264
8.192
6.272
9.408
10.24
8.192
R
(Hex)
A
7
8
6
7
6
6
9
9
9
9
9
7
8
6
7
6
7
N
PD Rev 4.4 July 2009
WM8976
BOAC93
F28BD4
45A1CA
D3A06E
3D70A3
2DB492
EE009E
F28BD4
86C226
8FD525
6872AF
FD809F
86C226
8FD525
3126E8
1F76F7
3126E8
482296
(Hex)
K
73