WM8976GEFL/V Wolfson Microelectronics, WM8976GEFL/V Datasheet - Page 78

• Manufacturer Part Number: WM8976GEFL/V
• Description: Audio CODECs Mono ADC Stereo DAC with Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8976GEFL/V

• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8976
RESETTING THE CHIP
w
3-WIRE SERIAL CONTROL MODE
Figure 43 3-Wire Serial Control Interface
2-WIRE SERIAL CONTROL MODE
Figure 44 2-Wire Serial Control Interface
In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on
CSB/GPIO1 pin latches in a complete control word consisting of the last 16 bits.
The WM8976 supports software control via a 2-wire serial bus. Many devices can be controlled by
the same bus, and each device has a unique 7-bit device address (this is not the same as the 7-bit
address of each register in the WM8976).
The WM8976 operates as a slave 2-wire device only. The controller indicates the start of data
transfer with a high to low transition on SDIN while SCLK remains high. This indicates that a device
address and data will follow. All devices on the 2-wire bus respond to the start condition and shift in
the next eight bits on SDIN (7-bit address + Read/Write bit, MSB first). If the device address received
matches the address of the WM8976, then the WM8976 responds by pulling SDIN low on the next
clock pulse (ACK). If the address is not recognised or the R/W bit is ‘1’ when operating in write only
mode, the WM8976 returns to the idle condition and wait for a new start condition and valid address.
During a write, once the WM8976 has acknowledged a correct address, the controller sends the first
byte of control data (B15 to B8, i.e. the WM8976 register address plus the first bit of register data).
The WM8976 then acknowledges the first data byte by pulling SDIN low for one clock pulse. The
controller then sends the second byte of control data (B7 to B0, i.e. the remaining 8 bits of register
data), and the WM8976 acknowledges again by pulling SDIN low.
Transfers are complete when there is a low to high transition on SDIN while SCLK is high. After a
complete sequence the WM8976 returns to the idle state and waits for another start condition. If a
start or stop condition is detected out of sequence at any point during data transfer (i.e. SDIN
changes while SCLK is high), the device jumps to the idle condition.
In 2-wire mode the WM8976 has a fixed device address, 0011010.
The WM8976 can be reset by performing a write of any value to the software reset register (address
0 hex). This will cause all register values to be reset to their default values. In addition to this there
is a Power-On Reset (POR) circuit which ensures that the registers are set to default when the device
is powered up.
SCLK
SDIN
START
DEVICE ADDRESS
(7 BITS)
RD / WR
BIT
(LOW)
ACK
register address and
CONTROL BYTE 1
1st register data bit
(BITS 15 TO 8)
(LOW)
ACK
CONTROL BYTE 1
remaining 8 bits of
(BITS 7 TO 0)
register data
PD Rev 4.4 July 2009
(LOW)
ACK
Production Data
STOP
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