TDA7491MV STMicroelectronics, TDA7491MV Datasheet
TDA7491MV
Specifications of TDA7491MV
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TDA7491MV Summary of contents
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... Thanks to the high efficiency and an exposed-pad-down (EPD) package no heatsink is required. Furthermore, the filterless operation allows a reduction in the external component count. The TDA7491MV is pin to pin compatible with the TDA7491P, TDA7491LP and TDA7491HV for the left channel as given in PowerSSO-36 EPD PowerSSO-36 EPD Doc ID 14576 Rev 2 ...
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... Input resistance and capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.4 Internal and external clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4.1 7.4.2 7.5 Filterless modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.6 Output low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.7 Protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8 Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.9 Heatsink requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2/28 Master mode (internal clock Slave mode (external clock Doc ID 14576 Rev 2 TDA7491MV ...
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... TDA7491MV List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 4. Thermal data Table 5. Electrical specifications Table 6. PowerSSO-36 slug down dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 7. Mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 8. Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 9. How to set up SYNCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 14576 Rev 2 ...
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... Master and slave connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 23. Unipolar PWM output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 24. Typical LC filter for a 8-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 25. Typical LC filter for a 4-Ω speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 26. Behavior of pin DIAG for various protection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 27. Power derating curves for PCB used as heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4/28 Doc ID 14576 Rev 2 TDA7491MV ...
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... TDA7491MV 1 Device block diagram Figure 1 shows the block diagram of the TDA7491MV. Figure 1. Internal block diagram Doc ID 14576 Rev 2 Device block diagram 5/28 ...
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... Pin connection (top view, PCB view) SUB_GND 6/ OUTN 11 OUTN 12 PVCC 13 PVCC Exposed pad down 14 PGND 15 PGND 16 OUTP 17 OUTP 18 PGND Doc ID 14576 Rev 2 TDA7491MV VSS 36 SVCC 35 VREF 34 SGND 33 VDDS 32 GAIN1 31 GAIN0 30 SVR 29 DIAG 28 SGND 27 VDDS 26 SYNCLK 25 ROSC 24 INN 23 INP 22 21 MUTE STBY 20 19 VDDPW ...
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... TDA7491MV 2.2 Pin list Table 2. Pin description list Number Name 1 SUB_GND 2,3 NC 4,5 NC 6,7 NC 8,9 NC 10,11 OUTN 12,13 PVCC 14,15 PGND 16,17 OUTP 18 PGND 19 VDDPW 20 STBY 21 MUTE 22 INP 23 INN 24 ROSC 25 SYNCLCK 26 VDDS 27 SGND 28 DIAG 29 SVR 30 GAIN0 31 GAIN1 32 VDDS 33 SGND 34 VREF 35 SVCC ...
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... Section 7.9: Heatsink requirements on page Table 5 below are given for the conditions kΩ 100 nF kHz, G OSC Parameter Condition - Without LC filter - Play mode Mute mode = 0 Ω Differential input Doc ID 14576 Rev 2 TDA7491MV Value Unit °C -40 to 150 °C -40 to 150 °C Min Typ Max Unit - 2 3 ° ...
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... TDA7491MV Table 5. Electrical specifications (continued) Symbol Undervoltage protection V UVP threshold R Power transistor on resistance dsON P Output power o P Output power o P Output power o P Dissipated power D η Efficiency THD Total harmonic distortion G Closed loop gain V ∆G Gain matching V eN Total input noise ...
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... SW SYNCLK 10/28 Parameter Condition V < 0 STBY V > 2.5 V, STBY V < 0.8 V MUTE V > 2.5 V, STBY V > 2.5 V MUTE + 182 kHz OSC SYNCLK SW Doc ID 14576 Rev 2 TDA7491MV Min Typ = X Standby MUTE Mute Play with kΩ (see Figure 18.) Max Unit - - - ...
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... TDA7491MV 4 Characterization curves The following characterization curves were made using the TDA7491MV demo board. The LC filter for the 8-Ω load uses components of 33 µH and 220 nF. All other test conditions are given along side the corresponding curves. Figure 3. Output power vs supply voltage ...
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... Specification Limit: 0.02 Typical: 0.01 Po =20W @ THD =10% 0.005 100m 200m THD (%) 1 0.5 0.2 0.1 0.05 0.02 0. 100 Ampl (dB Doc ID 14576 Rev 2 500m Output Power (W) 200 500 10k 20k Frequency (Hz) 100 200 500 10k 30k Frequency (Hz) TDA7491MV 30 ...
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... TDA7491MV Figure 8. FFT (0 dB) Test Condition: Vcc =18V, RL= 8 ohm, Rosc =39kΩ, Cosc =100nF 1kHz, Gv =30dB, Po =1W Tamb =25℃ Specification Limit: Typical: >60dB for the harmonic frequency Figure 9. FFT (-60 dB) Test Condition: Vcc =18V, RL= 8 ohm, Rosc =39kΩ, Cosc =100nF, ...
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... Mute voltage (V) Mute voltage (V) Iquiescent vs Standby voltage Iquiescent vs Standby voltage Vcc=18V 20 20 Rload=8ohm Gain=30dB 15 15 Vin 0.5 0 1.5 1.5 Standby voltage (V) Standby voltage (V) Doc ID 14576 Rev 2 TDA7491MV 4 4 3.5 3 2.5 2 1.5 1 0.5 0 2.5 2 3.5 3 2.5 2 3.5 3.5 ...
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... TDA7491MV Figure 14. Attenuation vs voltage on pin STBY Test Condition : Vcc = 5~18V ohm, Rosc =39k O , Cosc =100nF, 0dB@f=1kHz, Po=1w, Gv =30dB, Tamb =25℃ Figure 15. Power supply rejection ratio vs frequency Test Condition : Vcc = 18V ohm, Rosc =39k O , Cosc =100nF, Vin=0, Gv =30dB, Tamb =25℃ Attenuation vs Standby voltage ...
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... Characterization curves 4.1 Test board Figure 16. Test board (TDA7491HV) layout 16/28 Doc ID 14576 Rev 2 TDA7491MV ...
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... TDA7491MV 5 Package mechanical data The TDA7491MV comes in a 36-pin PowerSSO package with exposed pad down. Figure 17 below shows the package outline and Figure 17. PowerSSO-36 EPD outline drawing Table 6 gives the dimensions. Doc ID 14576 Rev 2 Package mechanical data 17/28 ...
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... Doc ID 14576 Rev 2 TDA7491MV Dimensions in inches Min Typ 0.085 - 0.097 0.085 - 0.094 0.000 - 0.004 0.007 - 0.014 0.009 - 0.013 0.398 - 0.413 0.291 - 0.299 - 0.020 - - 0.335 - - 0.091 - - - 0.004 0.398 - 0 ...
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... Compatibility with TDA7491 stereo BTL family TDA7491MV mono BTL analog class-D amplifier is derived from the TDA7491 stereo analog class-D BTL family. TDA7491MV has only the left channel of the stereo BTL family. In order to guarantee the pin to pin compatibility when moving the application from stereo to ...
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... Application information 7.1 Mode selection The three operating modes of the TDA7491MV are set by the two inputs STBY (pin 20) and MUTE (pin 21). Standby mode: all circuits are turned off, very low current consumption. Mute mode: inputs are connected to ground and the positive and negative PWM outputs are at 50% duty cycle ...
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... TDA7491MV 7.2 Gain setting The gain of the TDA7491MV is set by the two inputs, GAIN0 (pin 30) and GAIN1 (pin 31). Internally, the gain is set by changing the feedback resistors of the amplifier. Table 8. Gain settings GAIN0 7.3 Input resistance and capacitance The input impedance is set by an internal resistor kΩ (typical). An input capacitor (Ci) is required to couple the AC input signal ...
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... If two or more class-D amplifiers are used in the same system recommended that all devices operate at the same clock frequency. This can be implemented by using one TDA7491MV as master clock, while the other devices are in slave mode (that is, externally clocked. The clock interconnect is via pin SYNCLK of each device. As explained below, SYNCLK is an output in master mode and an input in slave mode ...
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... TDA7491MV can be used without a filter before the speaker, because the frequency of the TDA7491MV output is beyond the audio frequency, the audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. Figure 23. Unipolar PWM output ...
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... It is necessary to choose the L-C component values depending on the loud speaker impedance. Some typical values, which give a cut-off frequency of 27 kHz, are shown in Figure 24 Figure 24. Typical LC filter for a 8-Ω speaker Figure 25. Typical LC filter for a 4-Ω speaker 24/28 and Figure 25 below. Doc ID 14576 Rev 2 TDA7491MV ...
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... TDA7491MV 7.7 Protection function The TDA7491MV is fully protected against overvoltages, undervoltages, overcurrents and thermal overloads as explained here. Overvoltage protection (OVP) If the supply voltage exceeds the value for V page 8 the overvoltage protection is activated which forces the outputs to the high-impedance state. When the supply voltage drops to below the threshold value the device restarts ...
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... As with most amplifiers, the power dissipated within the device depends primarily on the supply voltage, the load impedance and the output modulation level. The maximum estimated power dissipation for the TDA7491MV is less than 4 W. When properly mounted on the above PCB the junction temperature could increase by 96 °C. ...
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... TDA7491MV 8 Revision history Table 10. Document revision history Date 21-Oct-2008 29-May-2009 Revision 1 Initial release. Updated text concerning oscillator R and C in Electrical specifications on page 8 Updated test condition for Iq, added V MUTE voltages and rectified several anomalies in Electrical specifications on page 8 Updated equation for f 2 Updated ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 28/28 Please Read Carefully: © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 14576 Rev 2 TDA7491MV ...