WM8990ECS/RV Wolfson Microelectronics, WM8990ECS/RV Datasheet - Page 45

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WM8990ECS/RV

Manufacturer Part Number
WM8990ECS/RV
Description
Audio CODECs Stereo CODEC w.Class AB/D speaker driver
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8990ECS/RV

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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INPUT PGA VOLUME CONTROL
Each of the four Input PGAs has an independently controlled gain range of -16.5dB to +30dB in
1.5dB steps. The gains on the inverting and non-inverting inputs to the PGAs are always equal. Each
Input PGA can be independently muted using the PGA mute bits as described in Table 5, with
specified mute attenuation achieved by simultaneously disconnecting the corresponding inputs
described in Table 4.
To prevent "zipper noise", a zero-cross function is provided, so that when enabled, volume updates
will not take place until a zero-crossing is detected. In the event of a long period without zero-
crossings, a timeout function is available. When this function is enabled (using the TOCLK_ENA
register bit), the volume will update after the timeout period if no earlier zero-cross has occurred. The
timeout period is set by TOCLK_RATE. See “Clocking and Sample Rates” for more information on
these fields.
The IPVU bit controls the loading of the input PGA volume data. When IPVU is set to 0, the PGA
volume data will be loaded into the respective control register, but will not actually change the gain
setting. The LIN12, RIN12, LIN34, RIN34 volume settings are all updated when a 1 is written to
IPVU. This makes it possible to update the gain of all input paths simultaneously.
The Input PGA Volume Control register fields are described in Table 5 and Table 6.
R24 (18h)
R25 (19h)
R26 (1Ah)
REGISTER
ADDRESS
8
7
6
4:0
8
7
6
4:0
8
7
6
BIT
IPVU[0]
LI12MUTE
LI12ZC
LIN12VOL
[4:0]
IPVU[1]
LI34MUTE
LI34ZC
LIN34VOL
[4:0]
IPVU[2]
RI12MUTE
RI12ZC
LABEL
N/A
1b
0b
01011b
(0dB)
N/A
1b
0b
01011b
(0dB)
N/A
1b
0b
DEFAULT
Input PGA Volume Update
Writing a 1 to this bit will cause all input
PGA volumes to be updated
simultaneously (LIN12, LIN34, RIN12 and
RIN34)
LIN12 PGA Mute
0 = Disable Mute
1 = Enable Mute
LIN12 PGA Zero Cross Detector
0 = Change gain immediately
1 = Change gain on zero cross only
LIN12 Volume
(See Table 6 for volume range)
Input PGA Volume Update
Writing a 1 to this bit will cause all input
PGA volumes to be updated
simultaneously (LIN12, LIN34, RIN12 and
RIN34)
LIN34 PGA Mute
0 = Disable Mute
1 = Enable Mute
LIN34 PGA Zero Cross Detector
0 = Change gain immediately
1 = Change gain on zero cross only
LIN34 Volume
(See Table 6 for volume range)
Input PGA Volume Update
Writing a 1 to this bit will cause all input
PGA volumes to be updated
simultaneously (LIN12, LIN34, RIN12 and
RIN34)
RIN12 PGA Mute
0 = Disable Mute
1 = Enable Mute
RIN12 PGA Zero Cross Detector
0 = Change gain immediately
1 = Change gain on zero cross only
DESCRIPTION
PD, March 2009, Rev 4.0
WM8990
45

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