WM8973LGEFL/RV Wolfson Microelectronics, WM8973LGEFL/RV Datasheet - Page 36

• Manufacturer Part Number: WM8973LGEFL/RV
• Description: Audio CODECs Stereo Codec with H/P Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8973LGEFL/RV

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8973L
w
ENABLING THE OUTPUTS
HEADPHONE SWITCH
Each analogue output of the WM8973L can be separately enabled or disabled. The analogue mixer
associated with each output is powered on or off along with the output pin. All outputs are disabled by
default. To save power, unused outputs should remain disabled.
Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop
noise (see “Power Management” and “Applications Information” sections)
Table 29 Analogue Output Control
Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor.
This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and
each output can be controlled using the VROI bit in register 27. The default is low (1.5k ), so that
any capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for
disabled outputs, VROI can then be set to 1, increasing the resistance to about 40k .
Table 30 Disabled Outputs to VREF Resistance
The RINPUT3/HPDETECT pin can be used as a headphone switch control input to automatically
disable the speaker output and enable the headphone output e.g. when a headphone is plugged into
a jack socket. In this mode, enabled by setting HPSWEN, HPDETECT switches between headphone
and speaker outputs (e.g. when the pin is connected to a mechanical switch in the headphone socket
to detect plug-in). The HPSWPOL bit reverses the pin’s polarity. Note that the LOUT1, ROUT1,
LOUT2 and ROUT2 bits in register 26 must also be set for headphone and speaker output (see
Table 31 and Table 32).
Note:
When RINPUT3/HPDETECT is used as the HPDETECT input, the thresholds become CMOS levels
(0.3 AVDD / 0.7 AVDD).
Table 31 Headphone Switch Operation
R26 (1Ah)
Power
Management
(2)
Note: All “Enable” bits are 1 = ON, 0 = OFF
R27 (1Bh)
Additional (1)
HPSWEN
REGISTER
REGISTER
ADDRESS
ADDRESS
0
0
0
0
1
1
1
1
1
1
1
1
HPSWPOL HPDETECT
6
5
4
3
2
1
6
X
X
X
X
BIT
BIT
0
0
0
0
1
1
1
1
LOUT1
ROUT1
LOUT2
ROUT2
MONO
OUT3
VROI
(PIN23)
LABEL
LABEL
X
X
X
X
0
0
1
1
0
0
1
1
L/ROUT1
(reg. 26)
0
0
0
0
0
0
0
DEFAULT
DEFAULT
0
0
1
1
X
X
0
1
0
1
X
X
L/ROUT2
(reg. 26)
X
X
X
X
0
1
0
1
0
1
0
1
LOUT1 Enable
ROUT1 Enable
LOUT2 Enable
ROUT2 Enable
MONOOUT Enable
OUT3 Enable
VREF to analogue output resistance
0: 1.5 k
1: 40 k
Headphone
enabled
yes
yes
yes
yes
PD Rev 4.2 September 2005
no
no
no
no
no
no
no
no
DESCRIPTION
DESCRIPTION
Speaker
Production Data
enabled
yes
yes
yes
yes
no
no
no
no
no
no
no
no
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