WM8900LGEFK/RV Wolfson Microelectronics, WM8900LGEFK/RV Datasheet - Page 94

• Manufacturer Part Number: WM8900LGEFK/RV
• Description: Audio CODECs Ultra Low Power Hi-Fi CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8900LGEFK/RV

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8900
w
R5 (05h)
Audio Interface 2
REGISTER ADDRESS
11:10
6:5
4:3
15
14
13
12
BIT
6
4
3
2
1
0
AIF_WL
[1:0]
AIF_FMT
[1:0]
DACL_SRC
DACR_SRC
AIFDAC_TDM
AIFDAC_TDM_CHAN
DAC_BOOST
[1:0]
ADCLRC_FN
DAC_COMP
DAC_COMPMODE
ADC_COMP
ADC_COMPMODE
LOOPBACK
LABEL
DEFAULT
10
10
00
0
1
0
0
0
0
0
0
0
0
Digital Audio Interface Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
Digital Audio Interface Format
00 = Right justified
01 = Left justified
10 = I
11 = DSP Mode
Left DAC Data Source Select
0 = Left DAC outputs left channel data
1 = Left DAC outputs right channel data
Right DAC Data Source Select
0 = Right DAC outputs left channel data
1 = Right DAC outputs right channel data
DAC TDM Enable
0 = Normal DACDAT operation
1 = TDM enabled on DACDAT
DACDAT TDM Channel Select
0 = DACDAT data input on slot 0
1 = DACDAT data input on slot 1
DAC Input Volume Boost
00 = 0dB
01 = +6dB
(Input data must not exceed -6dBFS)
10 = +12dB
(Input data must not exceed -12dBFS)
11 = +18dB
(Input data must not exceed -18dBFS)
ADCLRC/GPIO Pin Function Select
0 = ADCLRC frame clock for ADC
1 = GPIO pin
DAC Companding enable
0 = off
1 = on
DAC Companding mode select:
0 = µ-law
1 = A-law
ADC Companding enable
0 = off
1 = on
ADC Companding mode select:
0 = µ-law
1 = A-law
Digital Loopback Function
0 = No loopback.
1 = Loopback enabled, ADC data output is
fed directly into DAC data input.
2
S Format
DESCRIPTION
PD, August 2008, Rev 4.0
Production Data
94