TP3067BDWR

Manufacturer Part NumberTP3067BDWR
DescriptionAudio CODECs Mono Serial Intfc PCM Codec/Filter
ManufacturerTexas Instruments
TP3067BDWR datasheet
 


Specifications of TP3067BDWR

Number Of Adc Inputs1Number Of Dac Outputs1
Interface TypeSerial (2-Wire)Maximum Operating Temperature+ 70 C
Mounting StyleSMD/SMTPackage / CaseSOIC-16
Minimum Operating Temperature0 CNumber Of Channels1 ADC, 1 DAC
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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D
Complete PCM Codec and Filtering
Systems Include:
– Transmit High-Pass and Low-Pass
Filtering
– Receive Low-Pass Filter With (sin x)/x
Correction
– Active RC Noise Filters
-Law or A-Law Compatible Coder and
Decoder
– Internal Precision Voltage Reference
– Serial I/O Interface
– Internal Autozero Circuitry
description
The TP3064B, TP3067B, TP13064B, and
TP13067B each comprise a single-chip pulse-
code-modulation encoder and decoder (PCM
codec), and PCM line filter. They also provide
band-pass filtering of the analog signals prior to
the encoding, and low-pass filtering after the
decoding of voice signals and call-progress tones.
All the functions required to interface a full-duplex
(2-wire) voice telephone circuit with a time-divi-
sion-multiplexed (TDM) system are included
on-chip. These devices are pin-for-pin compatible
with the National Semiconductor TP3064 and
TP3067. Primary applications include:
Line interface for digital transmission and
switching of T1 carrier, PABX (private
automated branch exchange), and central
office telephone systems
Subscriber line concentrators
Digital-encryption systems
Digital voice-band data-storage systems
Digital signal processing
These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A
conversion) as well as the transmit and receive filtering functions in a PCM system, and are intended to be used
at the analog termination of a PCM line or trunk. They require a transmit master clock and a receive master clock
that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that are
synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive
frame-sync pulses. The TP3064B and TP13064B contain patented circuitry to achieve low transmit channel
idle noise and are not recommended for applications in which the composite signals on the transmit side are
below – 55 dBm0.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the CMOS gates.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
TP3064B, TP3067B, TP13064B, TP13067B
MONOLITHIC SERIAL INTERFACE
COMBINED PCM CODEC AND FILTER
D
-Law – TP13064B and TP3064B
D
A-Law – TP13067B and TP3067B
D
5 -V Operation
D
Low Operating Power . . . 70 mW Typ
D
Power-Down Standby Mode . . . 3 mW Typ
D
Automatic Power Down
D
TTL- or CMOS-Compatible Digital Interface
D
Maximizes Line Interface Card Circuit
Density
D
Improved Versions of National
Semiconductor TP3064, TP3067, TP3064-X,
and TP3067-X
VPO+
ANLG GND
VPO –
VFRO
BCLKR/CLKSEL
MCLKR/PDN
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SCTS031D – MAY 1990 –REVISED JULY 1996
DW OR N PACKAGE
(TOP VIEW)
V
1
20
BB
VFXI+
2
19
VFXI –
3
18
VPI
GSX
4
17
ANLG LOOP
5
16
V
TSX
6
15
CC
FSR
FSX
7
14
DR
DX
8
13
BCLKX
9
12
MCLKX
10
11
Copyright
1996, Texas Instruments Incorporated
1

TP3067BDWR Summary of contents

  • Page 1

    ... These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the CMOS gates. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. ...

  • Page 2

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 The TP3064B and TP3067B are characterized for operation from The TP13064B and TP13067B are characterized for ...

  • Page 3

    TERMINAL NAME NO. ANLG GND 2 Analog ground. All signals are referenced to ANLG GND. ANLG LOOP 16 Analog loopback control input. Must be set to logic low for normal operation. When pulled to logic high, the transmit filter input ...

  • Page 4

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V (see Note 1) CC Supply voltage, V ...

  • Page 5

    PARAMETER PARAMETER Power down Supply current from V CC Supply current from V CC Active Power down ...

  • Page 6

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 analog interface with power amplifiers PARAMETER I I Input current r i Input resistance r o Output resistance VPO + or ...

  • Page 7

    PARAMETER f clock(M) Frequency of master clock f clock(B) Frequency of bit clock, transmit t r1 Rise time of master clock t f1 Fall time of master clock t r2 Rise time of bit clock, transmit t f2 ...

  • Page 8

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 operating characteristics over operating free-air temperature range –5 V 5%, GND 1.2276 V, ...

  • Page 9

    PARAMETER Transmit delay, absolute (at 0 dBm0) Transmit filter gain, relative to absolute Receive delay, absolute (at 0 dBm0) Receive delay, relative to absolute † All typical values are ...

  • Page 10

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 power supply rejection PARAMETER 100 mVrms, Positive power-supply rejection, transmit VFXI+ = – 50 ...

  • Page 11

    PARAMETER Crosstalk, transmit to receive Crosstalk, receive to transmit (see Note 7) † All typical values are – and NOTE 7: Receive-to-transmit crosstalk ...

  • Page 12

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 PARAMETER MEASUREMENT INFORMATION TSX 20 80% 80% 80% MCLKX 20% MCLKR 80% 80% BCLKX ...

  • Page 13

    PARAMETER MEASUREMENT INFORMATION MCLKX 80% 80% MCLKR 20% 20 su1 t su1 80% 80% 80% BCLKX 1 2 20% 20 su2 80% FSX 20 ...

  • Page 14

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 system reliability and design considerations TP306xB, TP1306xB system reliability and design considerations are detailed in the following paragraphs. latch-up Latch-up is ...

  • Page 15

    Figure 3. Diode Configuration for Latch-Up Protection Circuitry internal sequencing Power-on reset circuitry initializes the TP3064B, TP3067B, TP13064B, and TP13067B devices when power is first applied, placing it into the power-down mode. DX and VFRO outputs go into high-impedance states ...

  • Page 16

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 asynchronous operation For asynchronous operation, separate transmit and receive clocks can be applied. MCLKX and MCLKR must be 2.048 MHz for ...

  • Page 17

    The transmit section input is an operational amplifier with provision for gain adjustment using two external resistors. Gains in excess across the audio pass band are possible via low noise and wide bandwidth. The operational ...

  • Page 18

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 power supplies While the pins of the TP1306xB and TP306xB families are well protected against electrical misuse recommended that ...

  • Page 19

    APPLICATION INFORMATION Hybrid 300 0 VPO + 3 VPO – TP3064B TP3067B R3 4 TP13064B VPI TP13067B R4 5 VFRO 7 FSR BCLKR 10 MCLKR/PDN NOTES: ...

  • Page 20

    TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 17 GSX R2 18 – VFXI – VFXI + R1 Analog R Input – 1 VPO – ...

  • Page 21

    ... Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability ...