MC100EP32DT ON Semiconductor, MC100EP32DT Datasheet

Clock Drivers & Distribution 3.3V/5V ECL Divide

MC100EP32DT

Manufacturer Part Number
MC100EP32DT
Description
Clock Drivers & Distribution 3.3V/5V ECL Divide
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC100EP32DT

Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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MC10EP32, MC100EP32
3.3V / 5V ECL B2 Divider
Description
CLK inputs.
this device only. For single−ended input conditions, the unused
differential input is connected to V
V
and V
to 0.5 mA. When not used, V
Upon power−up, the internal flip−flops will attain a random state; the
reset allows for the synchronization of multiple EP32’s in a system.
Features
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 11
BB
The MC10/100EP32 is an integrated B2 divider with differential
The V
The reset pin is asynchronous and is asserted on the rising edge.
The 100 Series contains temperature compensation.
V
V
350 ps Typical Propagation Delay
Maximum Frequency > 4 GHz Typical (Figure 3)
PECL Mode Operating Range:
NECL Mode Operating Range:
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
Pb−Free Packages are Available
CC
CC
may also rebias AC coupled inputs. When used, decouple V
CC
= 3.0 V to 5.5 V with V
= 0 V with V
BB
via a 0.01 mF capacitor and limit current sourcing or sinking
pin, an internally generated voltage supply, is available to
EE
= −3.0 V to −5.5 V
BB
EE
should be left open.
BB
= 0 V
as a switching reference voltage.
EE
1
BB
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5P
3K
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= MC100
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HP32
Publication Order Number:
A
L
Y
W
G
HEP32
1
ALYW
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10EP32/D
8
1
KEP32
ALYW
ALYWG
1
KP32
G
G
4

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MC100EP32DT Summary of contents

Page 1

MC10EP32, MC100EP32 3.3V / 5V ECL B2 Divider Description The MC10/100EP32 is an integrated B2 divider with differential CLK inputs. The V pin, an internally generated voltage supply, is available to BB this device only. For single−ended input conditions, the unused ...

Page 2

RESET 1 R CLK 2 B2 CLK Figure 1. 8−Lead Pinout (Top View) and Logic Diagram CLK RESET Q Table 3. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite ...

Page 3

Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 6. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 13 Output LOW Voltage (Note 13 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 6

Table 10. 100EP DC CHARACTERISTICS, NECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 19 Output LOW Voltage (Note 19 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 7

V 750 700 3.3 V 650 600 550 500 450 400 350 300 250 200 150 100 50 0 0.0 0.5 1.0 1 INPUT FREQUENCY (GHz) in Figure 3. Input Frequency (f ) versus Typical ...

Page 8

... MC10EP32MNR4 MC10EP32MNR4G MC100EP32D MC100EP32DG MC100EP32DR2 MC100EP32DR2G MC100EP32DT MC100EP32DTG MC100EP32DTR2 MC100EP32DTR2G MC100EP32MNR4 MC100EP32MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D ...

Page 9

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 10

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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