Si5350A-A-GM Silicon Laboratories Inc, Si5350A-A-GM Datasheet

Clock Generators & Support Products Any-Rate Dual PLL 125MHz Clk 8 outputs

Si5350A-A-GM

Manufacturer Part Number
Si5350A-A-GM
Description
Clock Generators & Support Products Any-Rate Dual PLL 125MHz Clk 8 outputs
Manufacturer
Silicon Laboratories Inc
Type
Any Frequency CMOS Clock Generatorr
Datasheet

Specifications of Si5350A-A-GM

Mounting Style
SMD/SMT
Max Input Freq
0.008 MHz
Max Output Freq
125 MHz
Number Of Outputs
8
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 40 C to + 85 C
Supply Current
25 mA
Package / Case
QFN-20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
F
Features
Applications
Description
The Si5350A is a user-definable custom clock generator that is ideally suited for
replacing crystals and crystal oscillators in cost-sensitive applications. Based on
a PLL + high resolution fractional divider MultiSynth
can generate any frequency up to 125 MHz on each of its outputs with 0 ppm
error. Spread spectrum is selectable (on/off) on any of the outputs. Custom pin-
controlled Si5350A devices can be requested using the ClockBuilder web-based
part number utility (www.silabs.com/ClockBuilder).
Functional Block Diagram
Rev. 0.2 11/10
A C T O R Y
Generates up to 8 non-integer
frequencies from 8 kHz to 125 MHz
Exact frequency synthesis at each
output (0 ppm error)
Glitchless frequency changes
Low output period jitter: 100 ps pp
Configurable Spread Spectrum
selectable at each output
User-configurable control pins:




HDTV, DVD/Blu-ray, set-top box
Audio/video equipment, gaming
Printers, scanners, projectors
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
P0
P1
XA
XB
Output Enable (OEB_0/1/2)
Power Down (PDN)
Frequency Select (FS_0/1)
Spread Spectrum Enable (SSEN)
10-MSOP
Control
Logic
OSC
- P
R OG R A M M A B L E
PLLA
PLLB
Synth
Synth
Synth
Multi
Multi
Multi
0
1
2
Si5350A
Copyright © 2010 by Silicon Laboratories
Residential gateways
Networking/communication
Servers, storage
Operates from a low-cost, fixed
frequency crystal: 25 or 27 MHz
Separate voltage supply pins:


Excellent PSRR eliminates external
power supply filtering
Very low power consumption
(<15 mA)
Available in 3 packages types:



A
Core VDD: 2.5 V or 3.3 V
Output VDDO: 2.5 V or 3.3 V
10-MSOP: 3 outputs
24-QSOP: 8 outputs
20-QFN (4x4 mm): 8 outputs
N Y
TM
CLK0
CLK1
CLK2
- F
architecture, the Si5350A
R E Q U E N C Y
P0
P1
P2
P3
P4
XA
XB
20-QFN, 24-QSOP
CMOS C
Control
Logic
OSC
PLLA
PLLB
Ordering Information:
24-QSOP
L O C K
Si5350A
See page 18
10-MSOP
20-QFN
Synth
Synth
Synth
Synth
Synth
Synth
Synth
Synth
Multi
Multi
Multi
Multi
Multi
Multi
Multi
Multi
G
0
1
2
3
4
5
6
7
Si5350A
E N E R A T O R
Si5350A
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7

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Si5350A-A-GM Summary of contents

Page 1

... Printers, scanners, projectors Description The Si5350A is a user-definable custom clock generator that is ideally suited for replacing crystals and crystal oscillators in cost-sensitive applications. Based on a PLL + high resolution fractional divider MultiSynth can generate any frequency up to 125 MHz on each of its outputs with 0 ppm error ...

Page 2

... Si5350A 2 Rev. 0.2 ...

Page 3

... ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4. Configuring the Si5350A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4.1. Crystal Inputs (XA, XB 4.2. Output Clocks (CLK0–CLK7 4.3. Programmable Control Pins (P0–P4) Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4. Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. Pin Descriptions (20-Pin QFN, 24-Pin QSOP ...

Page 4

... Si5350A 1. Electrical Specifications Table 1. Recommended Operating Conditions (V = 2.5 V ±10%, or 3.3 V ±10 –40 to 85° Parameter Symbol Ambient Temperature T A Core Supply Voltage V DD Output Buffer Voltage V DDOx Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. ...

Page 5

... MOD Test Condition Package 10-MSOP Still Air 24-QSOP JA 20-QFN 10-MSOP Still Air 24-QSOP JC 20-QFN = – °C) Test Condition Min 25 –0.1 0 Rev. 0.2 Si5350A Min Typ Max Unit — — — 10 > 1 MHz — 100 — 100 — — 200 — — ...

Page 6

... Si5350A Table 7. Output Characteristics (V = 2.5 V ±10%, or 3.3 V ±10 – ° Parameter Symbol Frequency Range F CLK Load Capacitance C L Duty Cycle DC Rise/Fall Time Output High Voltage V OH Output Low Voltage V OL Period Jitter J PER Cycle-to-Cycle Jitter J CC RMS Phase Jitter J RMS Table 8. 25 MHz Crystal Requirements ...

Page 7

... Typical Application The Si5350A is a user-definable custom clock generator that is ideally suited for replacing crystals and crystal oscillators in cost-sensitive applications. An example application is shown in CPU 27 MHz USB Controller Ethernet PHY Figure 1. Example of an Si5350A in an Audio/Video Application Figure 1. 74.25 74.25 MHz or MHz 1 ...

Page 8

... MultiSynth divider per output. A block diagram of both the 3-output and 8-output versions are shown in Figure 2. This unique architecture allows the Si5350A to generate up to eight independent, non-integer-related frequencies at any of its outputs. Each MultiSynth a pin controlled glitchless frequency change at each output (CLK0 to CLK5). ...

Page 9

... XTAL L to the Si5350A. Options for internal load capacitors are pF internal load capacitors. XTALs with alternate load capacitance requirements are supported using external load capacitors as shown in Figure 3. Figure 3. External XTAL with Optional Load Capacitors 4.2. Output Clocks (CLK0– ...

Page 10

... An optional power down control pin allows a full shutdown of the Si5350A to minimize power consumption when its output clocks are not being used. The Si5350A is in normal operation when the PDN pin is held low and is in power down mode when held high. Power consumption when the device is in power down mode is indicated in Table 3 on page 4 ...

Page 11

... Up to two frequency select pins are available on the Si5350A. Each of the frequency select pins can be linked to any of the clock outputs as shown in Figure 6. For example, FS_0 can be linked to control clock frequency selection on CLK0, CLK3, and CLK5; FS_1 can be used to control clock frequency selection on CLK1, CLK2, and CLK4 ...

Page 12

... Power Supply Decoupling/Filtering The Si5350A has built-in power supply filtering circuitry to help keep the number of external components to a minimum. All that is recommended is one 0.1 µF decoupling capacitor per power supply pin. This capacitor should be mounted as close to the VDD and VDDO pins as possible without using vias ...

Page 13

... Pin Descriptions (20-Pin QFN, 24-Pin QSOP) Si5350A 20-QFN (Top View GND P0 3 PAD Pin Number Pin Name 20-QFN 24-QSOP CLK0 13 21 CLK1 12 20 CLK2 9 15 CLK3 8 14 CLK4 19 3 CLK5 17 1 CLK6 16 24 CLK7 VDD 20 4 VDDOA 11 18 VDDOB 10 16 VDDOC ...

Page 14

... CLK0 10 O CLK1 9 O CLK2 VDD 1 P VDDO 7 P GND 8 P *Note Input Output Power 14 Si5350A 10-MSOP Top View VDD CLK0 CLK1 GND P0 VDDO CLK2 5 6 Function Input pin for external XTAL Input pin for external XTAL Output clock 0 Output clock 1 ...

Page 15

... Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components. Min Nom — — 0.10 — 0.19 — 0.15 — 8.55 8.65 6.00 BSC 3.81 3.90 0.635 BSC 0.40 — 0.25 BSC 0 — 0.10 0.17 0.10 Rev. 0.2 Si5350A Max 1.75 0.25 0.30 0.25 8.75 3.99 1. ...

Page 16

... Si5350A 8. Package Outline (20-Pin QFN)   Dimension aaa bbb ccc ddd eee Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Outline MO-220, variation VGGD-8. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body Components ...

Page 17

... BSC 4.90 BSC 3.00 BSC 0.50 BSC 0.40 0.60 0.25 BSC 0 — — — — — — — — — Rev. 0.2 Si5350A Max 1.10 0.15 0.95 0.33 0.23 0.80 8 0.20 0.25 0.10 0.08 17 ...

Page 18

... Si5350A devices with a user defined configuration. In addition to field programming, this development kit supports simplified device evaluation of any Si5350A device. The ordering part numbers for the development kits and blank Si5350A devices to be used for field programming are shown in Figure 9 and Figure 10, respectively. Si535x Figure 9 ...

Page 19

... N : OTES Rev. 0.2 Si5350A 19 ...

Page 20

... Si5350A C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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