PSMN2R0-30YL,115 NXP Semiconductors, PSMN2R0-30YL,115 Datasheet

MOSFET N-CH 30V 100A LFPAK

PSMN2R0-30YL,115

Manufacturer Part Number
PSMN2R0-30YL,115
Description
MOSFET N-CH 30V 100A LFPAK
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PSMN2R0-30YL,115

Package / Case
LFPak-4
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
2 mOhm @ 15A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
2.15V @ 1mA
Gate Charge (qg) @ Vgs
64nC @ 10V
Input Capacitance (ciss) @ Vds
3980pF @ 12V
Power - Max
97W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
2 mOhms
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
100 A
Power Dissipation
97 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4679-2
934063069115
PSMN2R0-30YL T/R
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
Table 1.
Symbol
V
I
P
T
Static characteristics
R
Dynamic characteristics
Q
D
j
DS
tot
DSon
GD
PSMN2R0-30YL
N-channel 30 V 2 mΩ logic level MOSFET in LFPAK
Rev. 4 — 10 March 2011
High efficiency due to low switching
and conduction losses
Class-D amplifiers
DC-to-DC converters
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
junction
temperature
drain-source
on-state
resistance
gate-drain charge V
Conditions
T
T
see
T
V
T
V
see
j
mb
mb
j
GS
GS
DS
≥ 25 °C; T
= 25 °C
Figure
Figure 15
= 25 °C; V
= 25 °C; see
= 10 V; I
= 4.5 V; I
= 12 V; see
1; see
j
D
≤ 175 °C
D
GS
= 15 A;
= 10 A;
Figure
Figure 2
= 10 V;
Figure 3
Suitable for logic level gate drive
sources
Motor control
Server power supplies
14;
[1]
Min
-
-
-
-55
-
-
Product data sheet
Typ
-
-
-
-
1.55 2
7.5
Max Unit
30
100
97
175
-
V
A
W
°C
mΩ
nC

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PSMN2R0-30YL,115 Summary of contents

Page 1

... PSMN2R0-30YL N-channel mΩ logic level MOSFET in LFPAK Rev. 4 — 10 March 2011 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for use in industrial and communications applications. 1.2 Features and benefits ...

Page 2

... Ω; unclamped avalanche energy R GS Simplified outline SOT669 (LFPAK) Description plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL Min = Figure °C; - j(init) ≤ sup Graphic symbol G mbb076 © NXP B.V. 2011. All rights reserved. ...

Page 3

... V sup GS 003aac471 120 P der (%) 150 200 T (°C) mb Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL Min - - = 20 kΩ -20 [1] Figure 1 - [1] Figure ° -55 -55 [ ° ...

Page 4

... Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN2R0-30YL Product data sheet N-channel mΩ logic level MOSFET in LFPAK = DSon Conditions see Figure All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL 003aac529 10 μs 100 μ 100 (V) DS Min Typ Max - 0.4 1.28 003aac481 δ ...

Page 5

... Figure 14; see Figure see Figure 14; DS see Figure MHz °C; see Figure 0.5 Ω 4 4.7 Ω R G(ext) All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL Min Typ Max Unit 1.3 1.7 2. µ 100 µ ...

Page 6

... Figure /dt = -100 A/µ 003aac470 25 ° (V) GS Fig 6. 003aac475 4 10 100 150 I (A) D Fig 8. All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL Min Typ - 0. 150 ( ( 100 Output characteristics: drain current as a function of drain-source voltage; typical values ...

Page 7

... V (V) GS Fig 10. Drain-source on-state resistance as a function 003aab271 typ max Fig 12. Gate-source threshold voltage as a function of All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL 4 R DSon (mΩ) 3.5 3 2 gate-source voltage; typical values 3 V ...

Page 8

... T j Fig 14. Gate charge waveform definitions 003aac473 5000 C (pF) 4000 (V) DS 3000 2000 1000 (nC) G Fig 16. Input, output and reverse transfer capacitances All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL GS(pl) V GS(th GS1 GS2 G(tot) C iss ...

Page 9

... Product data sheet N-channel mΩ logic level MOSFET in LFPAK 100 150 ° 0.0 0.2 0.4 0.6 All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL 003aac469 25 °C 0.8 1.0 V (V) SD © NXP B.V. 2011. All rights reserved ...

Page 10

... D max 4.41 2.2 0.9 0.25 0.30 4.10 4.20 3.62 2.0 0.7 0.19 0.24 3.80 REFERENCES JEDEC JEITA MO-235 All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL detail (1) (1) ( 5.0 3.3 6.2 0.85 1.3 1.27 4.8 3.1 5 ...

Page 11

... NXP Semiconductors 8. Revision history Table 7. Revision history Document ID Release date PSMN2R0-30YL v.4 20110310 • Modifications: Various changes to content. PSMN2R0-30YL_3 20090105 PSMN2R0-30YL Product data sheet N-channel mΩ logic level MOSFET in LFPAK Data sheet status Change notice Product data sheet - Product data sheet - All information provided in this document is subject to legal disclaimers ...

Page 12

... In case an individual agreement is concluded only the terms and conditions of the respective All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL © NXP B.V. 2011. All rights reserved ...

Page 13

... TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 March 2011 PSMN2R0-30YL Trademarks © NXP B.V. 2011. All rights reserved ...

Page 14

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 10 March 2011 Document identifier: PSMN2R0-30YL ...

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