IRFR9020PBF Vishay, IRFR9020PBF Datasheet - Page 8

• Manufacturer Part Number: IRFR9020PBF
• Description: MOSFET P-CH 50V 9.9A DPAK
• Manufacturer: Vishay

Specifications of IRFR9020PBF

• Transistor Polarity: P-Channel
• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 280 mOhm @ 5.7A, 10V
• Drain To Source Voltage (vdss): 50V
• Current - Continuous Drain (id) @ 25° C: 9.9A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 14nC @ 10V
• Input Capacitance (ciss) @ Vds: 490pF @ 25V
• Power - Max: 42W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Minimum Operating Temperature: - 55 C
• Configuration: Single
• Resistance Drain-source Rds (on): 0.28 Ohm @ 10 V
• Drain-source Breakdown Voltage: 50 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 9.9 A
• Power Dissipation: 42000 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Continuous Drain Current Id: -9.9A
• Drain Source Voltage Vds: -50V
• On Resistance Rds(on): 280mohm
• Rds(on) Test Voltage Vgs: -10V
• Threshold Voltage Vgs Typ: -4V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?90350.
www.vishay.com
8
Re-applied
voltage
Reverse
recovery
current
+
-
R
g
D.U.T.
Note
• Compliment N-Channel of D.U.T. for driver
a. V
Note
Driver gate drive
D.U.T. l
D.U.T. V
Inductor current
GS
= - 5 V for logic level and - 3 V drive devices
P.W.
SD
DS
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Body diode forward drop
Ripple ≤ 5 %
Period
Body diode forward
+
-
Fig. 17 - For P-Channel
• dV/dt controlled by R
• I
• D.U.T. - device under test
current
SD
Diode recovery
controlled by duty factor “D”
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
dV/dt
current transformer
dI/dt
D =
-
g
Period
P.W.
+
I
V
V
SD
GS
DD
= - 10 V
+
-
V
DD
a
S10-1135-Rev. C, 10-May-10
Document Number: 90350