FQB3P50TM Fairchild Semiconductor, FQB3P50TM Datasheet

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FQB3P50TM

Manufacturer Part Number
FQB3P50TM
Description
MOSFET P-CH 500V 2.7A D2PAK
Manufacturer
Fairchild Semiconductor
Series
QFET™r
Datasheets

Specifications of FQB3P50TM

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
4.9 Ohm @ 1.35A, 10V
Drain To Source Voltage (vdss)
500V
Current - Continuous Drain (id) @ 25° C
2.7A
Vgs(th) (max) @ Id
5V @ 250µA
Gate Charge (qg) @ Vgs
23nC @ 10V
Input Capacitance (ciss) @ Vds
660pF @ 25V
Power - Max
3.13W
Mounting Type
Surface Mount
Package / Case
D²Pak, TO-263 (2 leads + tab)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©2000 Fairchild Semiconductor International
FQB3P50 / FQI3P50
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
Absolute Maximum Ratings
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
V
I
I
V
E
I
E
dv/dt
P
T
T
R
R
R
D
DM
AR
J
L
Symbol
DSS
GSS
AS
AR
D
Symbol
, T
JC
JA
JA
STG
G
S
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
Power Dissipation (T
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
FQB Series
D
2
-PAK
D
- Continuous (T
- Continuous (T
- Pulsed
- Derate above 25°C
A
C
Parameter
Parameter
= 25°C) *
= 25°C)
G
D
T
S
C
C
C
= 25°C unless otherwise noted
= 25°C)
= 100°C)
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Features
• -2.7A, -500V, R
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
FQI Series
I
2
-PAK
FQB3P50 / FQI3P50
Typ
--
--
--
DS(on)
-55 to +150
= 4.9
-1.71
-10.8
-500
3.13
0.68
-2.7
250
-2.7
-4.5
300
8.5
85
G
30
! ! ! !
! ! ! !
@V
Max
1.47
62.5
40
GS
QFET
QFET
QFET
QFET
▶ ▶ ▶ ▶
▶ ▶ ▶ ▶
! ! ! !
! ! ! !
! ! ! !
! ! ! !
D
S
● ●
● ●
● ●
● ●
● ●
● ●
= -10 V
▲ ▲ ▲ ▲
▲ ▲ ▲ ▲
August 2000
Rev. A, August 2000
Units
W/°C
Units
°C/W
°C/W
°C/W
V/ns
mJ
mJ
°C
°C
W
W
V
A
A
A
V
A
TM

Related parts for FQB3P50TM

FQB3P50TM Summary of contents

Page 1

... Thermal Resistance, Junction-to-Ambient * JA R Thermal Resistance, Junction-to-Ambient JA * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor International Features • -2.7A, -500V, R • Low gate charge ( typical 18 nC) • Low Crss ( typical 9.5 pF) • Fast switching • 100% avalanche tested • ...

Page 2

... Repetitive Rating : Pulse width limited by maximum junction temperature 62mH -2.7A -50V ≤ -2.7A, di/dt ≤ 200A ≤ DSS, 4. Pulse Test : Pulse width ≤ 300 s, Duty cycle ≤ Essentially independent of operating temperature ©2000 Fairchild Semiconductor International T = 25°C unless otherwise noted C Test Conditions -250 -250 A, Referenced to 25° -500 ...

Page 3

... Drain Current [A] D Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 1200 1000 800 600 400 200 Drain-Source Voltage [V] DS Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International ※ Notes : 1. 250μ s Pulse Test 25℃ Figure 2. Transfer Characteristics ※ Note : T = 25℃ ...

Page 4

... Notes : 150 Single Pulse - Drain-Source Voltage [V] DS Figure 9. Maximum Safe Operating Area ©2000 Fairchild Semiconductor International (Continued) 2.5 2.0 1.5 1.0 ※ Notes : 0 -250 μ 0.0 100 150 200 -100 o C] Figure 8. On-Resistance Variation 3.0 2.5 100 2 1.5 1.0 0.5 0 ...

Page 5

... Resistive Switching Test Circuit & Waveforms -10V -10V Unclamped Inductive Switching Test Circuit & Waveforms -10V -10V ©2000 Fairchild Semiconductor International Gate Charge Test Circuit & Waveform Same Type Same Type as DUT as DUT -10V -10V DUT DUT DUT DUT ...

Page 6

... Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver ) ( Driver ) DUT ) ( DUT ) DUT ) ( DUT ) ©2000 Fairchild Semiconductor International + + DUT DUT Driver Driver Compliment of DUT Compliment of DUT (N-Channel) (N-Channel) • dv/dt controlled by R • dv/dt controlled by R • I • I controlled by pulse period ...

Page 7

... Package Dimensions 9.90 0.20 1.27 0.10 2.54 TYP 10.00 ©2000 Fairchild Semiconductor International 2 D PAK 0.80 0.10 2.54 TYP 0.20 4.50 0.20 +0.10 1.30 –0.05 0.10 0.15 2.40 0.20 +0.10 0.50 –0.05 10.00 0.20 (8.00) (4.40) (2XR0.45) 0.80 0.10 Rev. A, August 2000 ...

Page 8

... Package Dimensions (Continued) 9.90 1.27 0.10 2.54 TYP 10.00 ©2000 Fairchild Semiconductor International 2 I PAK 0.20 1.47 0.10 0.80 0.10 2.54 TYP 0.20 4.50 0.20 +0.10 1.30 –0.05 +0.10 0.50 2.40 –0.05 0.20 Rev. A, August 2000 ...

Page 9

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ CMOS™ FACT™ FACT Quiet Series™ ® FAST FASTr™ ...

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