PSMN005-55B,118 NXP Semiconductors, PSMN005-55B,118 Datasheet
PSMN005-55B,118
Specifications of PSMN005-55B,118
PSMN005-55B /T3
PSMN005-55B /T3
Related parts for PSMN005-55B,118
PSMN005-55B,118 Summary of contents
Page 1
... DISCRETE SEMICONDUCTORS DATA SHEET PSMN005-55B; PSMN005-55P N-channel logic level TrenchMOS Product specification (TM) transistor October 1999 ...
Page 2
... SiliconMAX products use the latest Philips Trench technology to achieve the lowest possible on-state resistance in each package at each voltage rating. Applications:- • d.c. to d.c. converters • switched mode power supplies The PSMN005-55P is supplied in the SOT78 (TO220AB) conventional leaded package. The PSMN005-55B is supplied in the SOT404 surface mounting package. PINNING PIN DESCRIPTION ...
Page 3
... 1 Resistive load Measured from tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad MHz Product specification PSMN005-55B; PSMN005-55P TYP. MAX MIN. MAX. - 268 - 75 MIN. TYP. MAX. UNIT -55˚ 1.0 1.5 2 ...
Page 4
... Continuous source current S (body diode) I Pulsed source current (body SM diode) V Diode forward voltage SD t Reverse recovery time rr Q Reverse recovery charge rr October 1999 (TM) transistor CONDITIONS -dI /dt = 100 Product specification PSMN005-55B; PSMN005-55P MIN. TYP. MAX. UNIT - - 240 A - 0. Rev 1.200 ...
Page 5
... 100 100 ms 100 = 25 ˚ PSMN005-55B; PSMN005-55P Transient thermal impedance, Zth j-mb (K/ 0.5 0.2 0.1 0.1 0.05 0. 0.01 single pulse 0.001 1E-06 1E-05 1E-04 1E-03 1E-02 Pulse width, tp (s) Fig.4. Transient thermal impedance f(t); parameter ...
Page 6
... October 1999 (TM) transistor 25 175 2 2 100 = 25 ˚ 100 120 140 160 180 = f PSMN005-55B; PSMN005-55P Threshold Voltage, VGS(TO) (V) 2.25 2 maximum 1.75 1.5 typical 1.25 minimum 1 0.75 0.5 0.25 0 -60 -40 - 100 120 140 160 180 Junction Temperature, Tj (C) Fig.10. Gate threshold voltage f(T ) ...
Page 7
... G 25 175 0.7 0.8 0 parameter PSMN005-55B; PSMN005-55P Maximum Avalanche Current, I (A) AS 100 10 Tj prior to avalanche = 150 C 1 0.001 0.01 0.1 Avalanche time Fig.15. Maximum permissible non-repetitive avalanche current (I ) versus avalanche time (t AS unclamped inductive load Product specifi ...
Page 8
... 0.9 1.3 0.7 15.8 6.4 10.3 2.54 0.7 1.0 0.4 15.2 5.9 9.7 REFERENCES IEC JEDEC EIAJ TO-220 8 PSMN005-55B; PSMN005-55P ( max. 15.0 3.30 3.8 3.0 2.6 3.0 13.5 2.79 3.6 2.7 2.2 EUROPEAN ISSUE DATE PROJECTION 97-06-11 Product specification SOT78 Rev 1 ...
Page 9
... 2 scale max. 0.85 0.64 1.60 10.30 2.90 11 2.54 0.60 0.46 1.20 9.70 2.10 REFERENCES IEC JEDEC EIAJ 9 PSMN005-55B; PSMN005-55P 2 -PAK); 3 leads SOT404 mounting base 15.40 2.60 14.80 2.20 EUROPEAN ISSUE DATE PROJECTION 98-12-14 99-06-25 Product specification Rev 1.200 ...
Page 10
... Philips for any damages resulting from such improper use or sale. October 1999 (TM) transistor 11.5 9.0 2.0 3.8 5.08 Fig.18. SOT404 : soldering pattern for surface mounting . 10 Product specification PSMN005-55B; PSMN005-55P 17.5 Rev 1.200 ...
Page 11
... Philips Semiconductors N-channel logic level TrenchMOS October 1999 (TM) transistor NOTES 11 Product specification PSMN005-55B; PSMN005-55P Rev 1.200 ...
Page 12
Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...