HEF4053BTD NXP Semiconductors, HEF4053BTD Datasheet

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HEF4053BTD

Manufacturer Part Number
HEF4053BTD
Description
Analog Multiplexer Triple 2:1 16-Pin SO Bulk
Manufacturer
NXP Semiconductors
Type
Analog Multiplexerr
Datasheet

Specifications of HEF4053BTD

Package
16SO
Maximum On Resistance
2500@5V Ohm
Maximum Propagation Delay Bus To Bus
130@15V|200@10V|555@5V ns
Maximum Low Level Output Current
10 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
400@5V ns
Maximum Turn-on Time
565@5V ns
Power Supply Type
Single
1. General description
2. Features and benefits
3. Applications
The HEF4053B is a triple single-pole double-throw (SPDT) analog switch, suitable for use
as an analog or digital multiplexer/demultiplexer. Each switch has a digital select input
(Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). All
three switches share an enable input (E). A HIGH on E causes all switches into the
high-impedance OFF-state, independent of Sn.
V
The V
swing between V
exceed 15 V. Unused inputs must be connected to V
operation as a digital multiplexer/demultiplexer, V
ground). V
The HEF4053B is suitable for use over both the industrial (−40 °C to +85 °C) and
automotive (−40 °C to +125 °C) temperature ranges.
DD
HEF4053B
Triple single-pole double-throw analog switch
Rev. 09 — 25 March 2010
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range −40 °C to +125 °C
Complies with JEDEC standard JESD 13-B
Industrial and automotive
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
and V
DD
to V
SS
EE
SS
are the supply voltage connections for the digital control inputs (Sn and E).
and V
range is 3 V to 15 V. The analog inputs/outputs (nY0, nY1 and nZ) can
DD
SS
as a positive limit and V
are the supply voltage connections for the switches.
EE
as a negative limit. V
EE
is connected to V
DD
, V
SS
, or another input. For
Product data sheet
DD
SS
− V
(typically
EE
may not

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HEF4053BTD Summary of contents

Page 1

HEF4053B Triple single-pole double-throw analog switch Rev. 09 — 25 March 2010 1. General description The HEF4053B is a triple single-pole double-throw (SPDT) analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. Each switch has a digital select ...

Page 2

... NXP Semiconductors 4. Ordering information Table 1. Ordering information − ° All types operate from +125 Type number Package Name HEF4053BP DIP16 HEF4053BT SO16 HEF4053BTT TSSOP16 5. Functional diagram Fig 1. Logic symbol HEF4053B_9 Product data sheet ° C. Description plastic dual in-line package; 16 leads (300 mil) plastic small outline package ...

Page 3

... NXP Semiconductors Sn E Fig 3. Logic diagram (one multiplexer/demultiplexer) from decoder and enable logic Fig 4. Schematic diagram (one switch) HEF4053B_9 Product data sheet Triple single-pole double-throw analog switch LEVEL CONVERTER LEVEL CONVERTER to other multiplexers/demultiplexers All information provided in this document is subject to legal disclaimers. ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning HEF4053B 2Y1 1 2 2Y0 3Y1 3Y0 001aae643 Fig 5. Pin configuration for SOT38-4 (DIP16) and SOT109-1 (SO16) 6.2 Pin description Table 2. Pin description Symbol Pin S1, S2, S3 11, 10, 9 1Y0, 2Y0, 3Y0 12 1Y1, 2Y1, 3Y1 13 1Z, 2Z, 3Z ...

Page 5

... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage DD V supply voltage EE I input clamping current IK V input voltage I I input/output current I/O I supply current DD T storage temperature ...

Page 6

... NXP Semiconductors Fig 7. Operating area as a function of the supply voltages 10. Static characteristics Table 6. Static characteristics Symbol Parameter Conditions |I | < 1 μA V HIGH-level IH O input voltage |I | < 1 μA V LOW-level IL O input voltage I input leakage I current I OFF-state Z port; S(OFF) leakage all channels OFF; current ...

Page 7

... NXP Semiconductors 10.1 Test circuits Fig 8. Test circuit for measuring OFF-state leakage current Z port Fig 9. Test circuit for measuring OFF-state leakage current nYn port 10.2 ON resistance Table 7. ON resistance ° μ 200 amb SW SS Symbol Parameter R ON resistance (peak) ON(peak resistance (rail) ON(rail) Δ ...

Page 8

... NXP Semiconductors 10.2.1 ON resistance waveform and test circuit Fig 10. Test circuit for measuring R Fig 11. Typical function of input voltage ON HEF4053B_9 Product data sheet nY0 nY1 400 R ON (Ω 300 200 10 V 100 All information provided in this document is subject to legal disclaimers. Rev. 09 — 25 March 2010 ...

Page 9

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics ° for test circuit see amb SS EE Symbol Parameter t HIGH to LOW propagation delay nYn nZ, nYn; see PHL t LOW to HIGH propagation delay nYn nZ, nYn; see PLH t HIGH to OFF-state PHZ propagation delay t OFF-state to HIGH PZH propagation delay ...

Page 10

... NXP Semiconductors E input nYn or nZ output LOW-to-OFF OFF-to-LOW nYn or nZ output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Fig 14. Enable and disable times Table 9. Measurement points Supply voltage HEF4053B_9 Product data sheet Triple single-pole double-throw analog switch PLZ PHZ switch ON switch OFF Table 9 ...

Page 11

... NXP Semiconductors Test data is given in Table Definitions: DUT = Device Under Test Termination resistance should be equal to output impedance Load capacitance including test jig and probe Load resistance. L Fig 15. Test circuit for measuring switching times Table 10. Test data Input nYn and ≤ [1] For nYn nYn propagation delays use V ...

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... NXP Semiconductors 11.2 Additional dynamic parameters Table 11. Additional dynamic characteristics ° amb Symbol Parameter THD total harmonic distortion −3 dB frequency response f (−3dB) α isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk [ biased Table 12. Dynamic power dissipation P P can be calculated from the formulas shown; V ...

Page 13

... NXP Semiconductors Fig 18. Test circuit for measuring isolation (OFF-state) a. Test circuit b. Input and output pulse definitions Fig 19. Test circuit for measuring crosstalk voltage between digital inputs and switch HEF4053B_9 Product data sheet Triple single-pole double-throw analog switch nY0 nY1 0. nY0 1 switch ...

Page 14

... NXP Semiconductors nY0 nY1 Switch closed condition Fig 20. Test circuit for measuring crosstalk between switches HEF4053B_9 Product data sheet = 001aaj909 All information provided in this document is subject to legal disclaimers. Rev. 09 — 25 March 2010 HEF4053B Triple single-pole double-throw analog switch nY0 nY1 Switch open condition ...

Page 15

... NXP Semiconductors 12. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 16

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 17

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 18

... NXP Semiconductors 13. Revision history Table 13. Revision history Document ID Release date HEF4053B_9 20100325 HEF4053B_8 20100224 • Modifications: Table 6 “Static HEF4053B_7 20091127 HEF4053B_6 20090924 HEF4053B_5 20090825 HEF4053B_4 20090713 HEF4053B_CNV_3 19950101 HEF4053B_CNV_2 19950101 HEF4053B_9 Product data sheet Triple single-pole double-throw analog switch Data sheet status ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 20

... NXP Semiconductors 15. Contact information For more information, please visit: For sales office addresses, please send an email to: HEF4053B_9 Product data sheet Triple single-pole double-throw analog switch http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 09 — 25 March 2010 HEF4053B © ...

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... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics 10.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10 ...

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