M29DW128G70NF6E NUMONYX, M29DW128G70NF6E Datasheet - Page 35

• Manufacturer Part Number: M29DW128G70NF6E
• Description: P7ED TSOP56 DUAL BANK
• Manufacturer: NUMONYX

M29DW128G
7.2.12
7.2.13
Table 9.
1. X don’t care, PA program address, PD program data, BAd any address in the block, BKA bank address, WBL write buffer
2. The maximum number of cycles in the command sequence is 36. N+1 is the number of words to be programmed during
3. Each buffer has the same A22-A5 addresses. A0-A4 are used to select a word within the N+1 word page.
4. The 6th cycle has to be issued N time. WBL scans the word inside the page.
5. BAd must be identical to the address loaded during the write to buffer program 3rd and 4th cycles.
Write to Buffer
Program
Write to Buffer
Program Confirm
Buffered Program
Abort and Reset
Unlock Bypass
Unlock Bypass
Program
Unlock Bypass
Block Erase
Unlock Bypass
Chip Erase
Unlock Bypass
Write to Buffer
Program
Unlock Bypass
CFI
Unlock Bypass
Reset
location. All values in the table are in hexadecimal.
the write to buffer program operation.
Command
The Enhanced Buffered Program Confirm command is used to confirm an Unlock Bypass
Enhanced Buffered Program command and to program the 256 words loaded in the buffer.
Unlock Bypass CFI command
The Unlock Bypass CFI command allows to use any address in the bank to perform a CFI
query when the memory is in the unlock bypass mode.
Unlock Bypass Reset command
The Unlock Bypass Reset command can be used to return to read/reset mode from unlock
bypass mode. Two bus write operations are required to issue the Unlock Bypass Reset
command. Read/Reset command does not exit from unlock bypass mode.
Fast program commands
N+5
N+3
2+
1
3
3
2
2
1
2
BKA
Add
BAd
BAd
555
555
555
(5)
X
X
X
X
1st
Data
AA
AA
AA
A0
29
80
80
25
98
90
Add Data
2AA
2AA
2AA
BAd
BAd
PA
X
X
2nd
N
PD
55
55
55
30
10
00
(2)
Add
BAd
555
555
PA
(3)
Bus write operations
3rd
Data
PD
F0
25
20
WBL
Add
BAd
(4)
4th
Data
N
PD
(2)
(1)
PA
Add
(3)
5th
Command interface
Data
PD
WBL
Add
(4)
6th
Data
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PD