M29DW128G70NF6E NUMONYX, M29DW128G70NF6E Datasheet - Page 62

• Manufacturer Part Number: M29DW128G70NF6E
• Description: P7ED TSOP56 DUAL BANK
• Manufacturer: NUMONYX

DC and AC parameters
Figure 16. Chip enable controlled program waveforms
1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check
2. PA is the address of the memory location to be programmed. PD is the data to be programmed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (see
4. See
Table 25.
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Symbol
t
t
t
t
t
t
t
t
t
t
EHWH
EHDX
WLEL
ELEH
DVEH
EHEL
GHEL
AVAV
AVEL
ELAX
of status register data polling bit.
and
Table 23: Read AC characteristics
Table 24: Write AC characteristics, write enable
t
Alt.
t
t
t
t
t
t
CPH
t
t
WC
WH
WS
CP
DS
DH
AS
AH
Write AC characteristics, chip enable controlled
Address Valid to Next Address Valid
Write Enable Low to Chip Enable Low
Chip Enable Low to Chip Enable High
Input Valid to Chip Enable High
Chip Enable High to Input Transition
Chip Enable High to Write Enable High
Chip Enable High to Chip Enable Low
Address Valid to Chip Enable Low
Chip Enable Low to Address Transition
Output Enable High Chip Enable Low
DQ0-DQ15
A0-A22
W
G
E
tAVAV
tWLEL
tGHEL
for details on the timings.
tDVEH
tELEH
Parameter
3rd cycle
555h
tAVEL
AOh
controlled,
4th cycle
tEHWH
tEHDX
PA
Table 25: Write AC characteristics, chip enable controlled
tEHEL1
PD
tELAX
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Section 8.2.1: Data polling bit
tWHWH1
Data polling
60 ns
PA
DQ7 D OUT
60
35
45
30
45
0
0
0
0
0
M29DW128G
AI14100b
70 ns
70
35
45
30
45
0
0
0
0
0
(DQ7)).
80 ns
80
35
45
30
45
0
0
0
0
0
M29DW128G
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns