LC4256V-75TN100E LATTICE SEMICONDUCTOR, LC4256V-75TN100E Datasheet - Page 28

• Manufacturer Part Number: LC4256V-75TN100E
• Description: CPLD ispMACH® 4000V Family 256 Macro Cells 168MHz EECMOS Technology 3.3V 100-Pin TQFP
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LC4256V-75TN100E

• Package: 100TQFP
• Family Name: ispMACH® 4000V
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 36
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 168 MHz
• Number Of Product Terms Per Macro: 80
• Memory Type: EEPROM
• Operating Temperature: -40 to 130 °C

Lattice Semiconductor
ispMACH 4000V/B/C Internal Timing Parameters (Cont.)
t
t
t
Control Delays
t
t
t
t
t
t
Note: Internal Timing Parameters are not tested and are for reference only. Refer to the Timing Model in this data sheet for further details.
PDLi
SRi
SRR
BCLK
PTCLK
BSR
PTSR
GPTOE
PTOE
Parameter
Propagation Delay through
Transparent Latch to Output/
Feedback MUX
Asynchronous Reset or Set to
Output/Feedback MUX Delay
Asynchronous Reset or Set
Recovery Time
GLB PT Clock Delay
Macrocell PT Clock Delay
Block PT Set/Reset Delay
Macrocell PT Set/Reset Delay
Global PT OE Delay
Macrocell PT OE Delay
Description
Over Recommended Operating Conditions
0.28
1.67
—
—
—
—
—
—
—
-2.5
0.25
1.12
0.87
1.83
1.11
1.83
2.83
28
—
—
ispMACH 4000V/B/C/Z Family Data Sheet
0.28
1.67
—
—
—
—
—
—
—
-2.7
0.25
1.12
0.87
1.83
1.41
4.13
2.13
—
—
0.28
1.67
—
—
—
—
—
—
—
-3
0.25
1.12
0.87
1.83
1.51
5.33
2.33
—
—
0.28
1.67
—
—
—
—
—
—
—
-3.5
0.25
1.12
0.87
1.83
1.61
5.33
2.83
—
—
Timing v.3.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns