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LFE3-70EA-8FN1156C
LFE3-70EA-8FN1156C | |
|---|---|
| Manufacturer Part Number | LFE3-70EA-8FN1156C |
| Description | 66.5K LUTS, 490 I/O, SERDES, 1.2V, -8 SPEED, PB-FREE |
| Manufacturer | LATTICE SEMICONDUCTOR |
| LFE3-70EA-8FN1156C datasheets |
|
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Lattice Semiconductor
SMPTE SD/HD-SDI/3G-SDI (Serial Digital Interface) Electrical and Timing
Characteristics
AC and DC Characteristics
Table 3-19. Transmit
Symbol
Description
BR
Serial data rate
SDO
2
T
Serial output jitter, alignment
JALIGNMENT
2
T
Serial output jitter, alignment
JALIGNMENT
1, 2
T
Serial output jitter, alignment
JALIGNMENT
T
Serial output jitter, timing
JTIMING
T
Serial output jitter, timing
JTIMING
T
Serial output jitter, timing
JTIMING
Notes:
1. Timing jitter is measured in accordance with SMPTE RP 184-1996, SMPTE RP 192-1996 and the applicable serial data transmission stan-
dard, SMPTE 259M-1997 or SMPTE 292M (proposed). A color bar test pattern is used.The value of f
SMPTE 259M, 540 MHz for SMPTE 344M or 1485 MHz for SMPTE 292M serial data rates. See the Timing Jitter Bandpass section.
2. Jitter is defined in accordance with SMPTE RP1 184-1996 as: jitter at an equipment output in the absence of input jitter.
3. All Tx jitter is measured at the output of an industry standard cable driver; connection to the cable driver is via a 50 ohm impedance differen-
tial signal from the Lattice SERDES device.
4. The cable driver drives: RL=75 ohm, AC-coupled at 270, 1485, or 2970 Mbps, RREFLVL=RREFPRE=4.75kohm 1%.
Table 3-20. Receive
Symbol
Description
BR
Serial input data rate
SDI
Stream of non-transitions
CID
(=Consecutive Identical Digits)
Table 3-21. Reference Clock
Symbol
Description
F
Video output clock frequency
VCLK
DC
Duty cycle, video clock
V
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
Test Conditions
Min.
270
270 Mbps
—
1485 Mbps
—
2970Mbps
—
270 Mbps
—
1485 Mbps
—
2970 Mbps
—
Test Conditions
Min.
270
7(3G)/26(SMPTE
Triple rates)
@ 10-12 BER
Test Conditions
Min.
27
45
3-50
Typ.
Max.
Units
—
2975
Mbps
—
0.20
UI
—
0.20
UI
—
0.30
UI
—
0.20
UI
—
1.0
UI
—
2.0
UI
is 270 MHz or 360 MHz for
SCLK
Typ.
Max.
Units
—
2970
Mbps
—
—
Bits
Typ.
Max.
Units
—
74.25
MHz
50
55
%
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