W232-10X Cypress Semiconductor Corp, W232-10X Datasheet

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... Pin Configurations AGND FBOUT VDD GND Q3 GND VDD Q6 OE0:4 Q7 FBOUT Q8 Q9 AGND VDD GND GND Q3 Q4 VDD OE FBOUT • 3901 North First Street • San Jose W232 < 140 MHz OUT 1 24 CLK 2 23 AVDD VDD GND 7 18 GND VDD 11 14 OE5 FBIN 1 ...

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... OE5:8 14 – Overview The W232 is a PLL-based clock driver designed for use in systems requiring a large number of synchronous timing signals. The clock driver has output frequencies 140 MHz and output-to-output skews of less than 100 ps. The W232 provides minimum cycle-to-cycle and long-term jitter, which is of significant importance to meet the tight input-to-input skew budget in DIMM applications ...

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... Reference clock provided to the ZDB goes HIGH. Synchronizing the other outputs of the ZDB to the outputs form the ASIC/Buffer is more complex however, as any propagation delay in the ASIC/Buffer must be accounted for. Reference Signal Feedback Input Figure 2. 6 Output Buffer in the Feedback Path W232 3. VDD VDD ...

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... A DD Test Condition [5] 30-pF load 0.8V to 2.0V, 30-pF load 2.0V to 0.8V, 30-pF load [3, 4] Measured All outputs loaded equally 30-pF load Power supply stable X = 24-pin TSSOP W232 Rating Unit –0.5 to +7.0 V –65 to +150 ° +70 °C –55 to +125 °C 0.5 W Min. Typ. ...

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... Package Diagram 24-Pin Thin Shrink Small Outline Package (TSSOP) Spread Aware is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07167 Rev. *B W232 Page [+] Feedback ...

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... Document Title: W232 Ten Output Zero Delay Buffer Document Number: 38-07167 Issue REV. ECN NO. Date Change ** 110277 10/25/01 *A 111278 03/22/02 *B 122808 12/15/02 Document #: 38-07167 Rev. *B Orig. of Description of Change SZV Change from Spec number: 38-00827 to 38-07167 IKA Put package type in order information table for TSSOP ...