ATA8202-PXQW Atmel, ATA8202-PXQW Datasheet - Page 18

• Manufacturer Part Number: ATA8202-PXQW
• Description: RF Wireless Misc Switchable Rx-IC f/Industrial(433MHz)
• Manufacturer: Atmel

Specifications of ATA8202-PXQW

• Package / Case: QFN-24
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.1
3.2
18
Pin CLK_OUT
Basic Clock Cycle of the Digital Circuitry
ATA8201/ATA8202
Pin CLK_OUT is an output to clock a connected microcontroller. The clock is available in
Standby and Active modes. The frequency f
CLK_OUT_CTRL0 and CLK_OUT_CTRL1, and is calculated as follows:
Table 3-2.
The signal at CLK_OUT output has a nominal 50% duty cycle. To save current, it is recom-
mended that CLK_OUT be switched off during Standby mode.
The complete timing of the digital circuitry is derived from one clock. As seen in
page
divider.
T
- Debouncing of the data signal stream
- Start-up time of the RX signal path
The start-up time and the debounce characteristic depend on the selected bit rate range
(BR_Range) which is defined by pins BR0 and BR1. The clock cycle T
lowing formulas for further reference:
BR_Range
f
DCLK
DCLK
CLK_OUT_CTRL1
17, this clock cycle, T
=
controls the following application relevant parameters:
f
---------- -
XTO
16
0
0
1
1
Setting of f
CLK_OUT_CTRL0
CLK_OUT
DCLK
, is derived from the crystal oscillator (XTO) in combination with a
0
1
0
1
BR_Range 0: T
BR_Range 1: T
BR_Range 2: T
BR_Range 3: T
C L K _ O U T
Clock on pin CLK_OUT is switched off
XDCLK
XDCLK
XDCLK
XDCLK
(Low level on pin CLK_OUT)
= 8
= 4
= 2
= 1
can be adjusted via the pins
f
f
f
CLK_OUT
CLK_OUT
CLK_OUT
Function
T
T
T
T
DCLK
DCLK
DCLK
DCLK
= f
XDCLK
= f
= f
XTO
XTO
XTO
/ 12
is defined by the fol-
/ 3
/ 6
4971C–INDCO–04/09
Figure 3-2 on