XC6VLX130T-1FFG784C

XC6VLX130T-1FFG784C

Manufacturer Part NumberXC6VLX130T-1FFG784C
DescriptionXC6VLX130T-1FFG784C
ManufacturerXilinx Inc
SeriesVirtex™ 6 LXT
XC6VLX130T-1FFG784C datasheet
 


Specifications of XC6VLX130T-1FFG784C

Number Of Logic Elements/cells128000Number Of Labs/clbs10000
Total Ram Bits9732096Number Of I /o400
Voltage - Supply0.95 V ~ 1.05 VMounting TypeSurface Mount
Operating Temperature0°C ~ 85°CPackage / Case784-BBGA, FCBGA
No. Of Logic Blocks20000No. Of Macrocells128000
Family TypeVirtex-6No. Of Speed Grades1
No. Of I/o's400Clock ManagementPLL
Core Supply Voltage Range1VRohs CompliantYes
Lead Free Status / RoHS StatusLead free / RoHS CompliantNumber Of Gates-
Other names122-1678  
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Revision History
The following table shows the revision history for this document:
Date
Version
02/02/09
1.0
Initial Xilinx release.
05/05/09
1.1
Added the FF1156 package for both the XC6VSX315T and XC6VSX475T devices in
Updated the PCI Express design discussion on
description and clarify 8 lanes at the 5.0 Gb/s data rate. Clerical edits to
10/100/1000 Mb/s Ethernet Controller (2500 Mb/s Supported)
text.
06/24/09
1.2
Added ordering information and FPGA documentation sections.
09/16/09
2.0
Added Virtex-6 HXT family information. Updated number to 26 Mb in
11/06/09
2.1
Clarified distributed RAM features on
Table
Interface Blocks for PCI Express Designs
01/28/10
2.2
In
Table
revised the VCO frequency minimum to 600 MHz which also revised the phase-shift timing increment.
Updated GTX transceivers operating data rate range to 6.6 Gb/s. Changed GTX PLL input reference
clock frequency divider.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
DS150 (v2.2) January 28, 2010
Advance Product Specification
Description of Revisions
page
1. Updated CLB slice number for the
1. Updated compliance to the PCI Express Base Specification Revision 2.0. Updated
section with link to documentation.
1, there are two Ethernet MACs in the XC6VHX255T. Under
www.xilinx.com
Virtex-6 Family Overview
Table 2, page
page 9
to remove the LogiCORE wrapper (<100 LUT)
Global Clock Lines
sections. Overall clarifications made in
Configuration
section.
XC6VHX565T
Clock Management, page
3.
and
in
Integrated
5,
10