LFE2M20E-6FN484C LATTICE SEMICONDUCTOR, LFE2M20E-6FN484C Datasheet - Page 15

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LFE2M20E-6FN484C

Manufacturer Part Number
LFE2M20E-6FN484C
Description
FPGA LatticeECP2M Family 19000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of LFE2M20E-6FN484C

Package
484FBGA
Family Name
LatticeECP2M
Device Logic Units
19000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
304
Ram Bits
1246208

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Lattice Semiconductor
Figure 2-10. Primary Clock Sources for ECP2-50
DLL Input
PLL Input
PLL Input
Clock
Clock
Input
Input
Note: This diagram shows sources for the ECP2-50 device. Smaller LatticeECP2 devices have fewer SPLLs. All LatticeECP2M device
have six SPLLs.
GPLL
SPLL
DLL
CLK
DIV
From Routing
to Eight Quadrant Clock Selection
Clock Input
Primary Clock Sources
Clock Input
Clock Input
2-12
From Routing
Clock Input
LatticeECP2/M Family Data Sheet
GPLL
SPLL
CLK
DLL
DIV
Architecture
PLL Input
Clock
Input
Clock
Input
DLL Input
PLL Input

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