LFE2M20E-6FN484C LATTICE SEMICONDUCTOR, LFE2M20E-6FN484C Datasheet - Page 241

• Manufacturer Part Number: LFE2M20E-6FN484C
• Description: FPGA LatticeECP2M Family 19000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFE2M20E-6FN484C

• Package: 484FBGA
• Family Name: LatticeECP2M
• Device Logic Units: 19000
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 304
• Ram Bits: 1246208

Lattice Semiconductor
LFE2M-20E/SE and LFE2M-35E/SE Logic Signal Connections: 256 fpBGA
Number
VCCIO
GNDIO
VCCIO
Ball
G11
D16
D15
C16
C15
C12
C11
C10
C14
C13
E13
F12
F11
E12
B16
A14
B15
B14
A11
A12
B11
B10
A10
B13
A13
F4
B9
D8
D9
C9
A5
C5
B5
C4
A8
C8
B8
C7
B7
A6
A7
C6
B4
B3
A4
C3
URC_SQ_VCCAUX33
URC_SQ_HDOUTN0
URC_SQ_HDOUTN1
URC_SQ_HDOUTN2
URC_SQ_HDOUTN3
URC_SQ_HDOUTP0
URC_SQ_HDOUTP1
URC_SQ_REFCLKN
URC_SQ_HDOUTP2
URC_SQ_HDOUTP3
URC_SQ_REFCLKP
URC_SQ_VCCRX0
URC_SQ_VCCOB0
URC_SQ_VCCOB1
URC_SQ_VCCRX1
URC_SQ_VCCRX2
URC_SQ_VCCOB2
URC_SQ_VCCOB3
URC_SQ_VCCRX3
URC_SQ_VCCTX0
URC_SQ_VCCTX1
URC_SQ_VCCTX2
URC_SQ_VCCTX3
URC_SQ_HDINN0
URC_SQ_HDINN1
URC_SQ_HDINP2
URC_SQ_HDINN2
URC_SQ_HDINN3
URC_SQ_HDINP3
URC_SQ_HDINP0
URC_SQ_VCCIB0
URC_SQ_VCCIB1
URC_SQ_HDINP1
URC_SQ_VCCIB2
URC_SQ_VCCIB3
URC_SQ_VCCP
Function
Ball/Pad
GNDIO2
VCCIO2
VCCIO2
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
PR9B
PR9A
XRES
LFE2M20E/SE
Bank
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
2
2
2
2
2
2
2
2
2
2
2
-
-
RUM0_SPLLC_FB_A
RUM0_SPLLT_FB_A
RUM0_SPLLC_IN_A
RUM0_SPLLT_IN_A
Dual Function
VREF2_2
VREF1_2
Differential
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
T
C
T
T
T
C
T
T
C
T
T
T
T
T
T
4-138
URC_SQ_VCCAUX33
URC_SQ_HDOUTP0
URC_SQ_HDOUTN0
URC_SQ_HDOUTN1
URC_SQ_HDOUTP1
URC_SQ_HDOUTP2
URC_SQ_HDOUTN2
URC_SQ_HDOUTN3
URC_SQ_HDOUTP3
URC_SQ_REFCLKN
URC_SQ_REFCLKP
URC_SQ_VCCRX0
URC_SQ_VCCOB0
URC_SQ_VCCOB1
URC_SQ_VCCRX1
URC_SQ_VCCRX2
URC_SQ_VCCOB2
URC_SQ_VCCOB3
URC_SQ_VCCRX3
URC_SQ_VCCTX0
URC_SQ_VCCTX1
URC_SQ_VCCTX2
URC_SQ_VCCTX3
URC_SQ_HDINN0
URC_SQ_HDINN1
URC_SQ_HDINN2
URC_SQ_HDINN3
URC_SQ_HDINP0
URC_SQ_VCCIB0
URC_SQ_VCCIB1
URC_SQ_HDINP1
URC_SQ_HDINP2
URC_SQ_VCCIB2
URC_SQ_VCCIB3
URC_SQ_HDINP3
URC_SQ_VCCP
Function
Ball/Pad
GNDIO2
VCCIO2
VCCIO2
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
XRES
PR9B
PR9A
LatticeECP2/M Family Data Sheet
Bank
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
2
2
2
2
2
2
2
2
2
2
2
-
-
LFE2M35E/SE
RUM0_SPLLC_FB_A/RDQ15
RUM0_SPLLT_FB_A/RDQ15
RUM0_SPLLC_IN_A/RDQ15
RUM0_SPLLT_IN_A/RDQ15
VREF2_2
VREF1_2
Function
RDQ15
RDQ15
RDQ15
Dual
Pinout Information
Differential
T (LVDS)*
T (LVDS)*
C(LVDS)*
C(LVDS)*
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T