NE555N_NL Fairchild Semiconductor, NE555N_NL Datasheet - Page 5

• Manufacturer Part Number: NE555N_NL
• Manufacturer: Fairchild Semiconductor
• Type: Standardr

Specifications of NE555N_NL

• # Internal Timers: 1
• Power Dissipation: 600mW
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5/9/12/15V
• Operating Supply Voltage (max): 16V
• Package Type: PDIP
• High Level Output Current: -200mA
• Low Level Output Current: 50mA
• Pin Count: 8
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Compliant

Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls
below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's
internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor C1
and setting the flip-flop output at the same time.
The voltage across the external capacitor C1, V
at td=1.1R
for the V
When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop,
turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.
In this way, the timer operating in the monostable repeats the above process. Figure 2 shows the time constant relationship
based on R
It must be noted that, for a normal operation, the trigger pulse voltage needs to maintain a minimum of Vcc/3 before the timer
output turns low. That is, although the output remains unaffected even if a different trigger pulse is applied while the output is
high, it may be affected and the waveform does not operate properly if the trigger pulse voltage at the end of the output pulse
remains at below Vcc/3. Figure 4 shows such a timer output abnormality.
2. Astable Operation
2. Astable Operation
2. Astable Operation
2. Astable Operation
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)
R
C1
L
A
A
*C. Hence, capacitor C1 is charged through resistor R
to reach 2Vcc/3. In other words, the time constant R
and C. Figure 3 shows the general waveforms during the monostable operation.
3
2
Figure 5. Astable Circuit
Figure 5. Astable Circuit
Figure 5. Astable Circuit
Figure 5. Astable Circuit
OUT
TRIG
RESET
4
GND
1
THRES
Vcc
DISCH
CONT
8
7
6
5
C1
C2
increases exponentially with the time constant t=R
+Vcc
R
R
B
A
C1
A
A
C controls the output pulse width.
Figure 6. Capacitance and Resistance vs. Frequency
Figure 6. Capacitance and Resistance vs. Frequency
Figure 6. Capacitance and Resistance vs. Frequency
Figure 6. Capacitance and Resistance vs. Frequency
. The greater the time constant R
1E-3
1E-3
1E-3
1E-3
0.01
0.01
0.01
0.01
100
100
100
100
0.1
0.1
0.1
0.1
10 10 10 10
100m
100m
100m
100m
1 1 1 1
1 1 1 1
10 10 10 10
Fr equency(Hz)
Fr equency(Hz)
Fr equency(Hz)
Fr equency(Hz)
100
100
100
100
A
A
*C and reaches 2Vcc/3
C, the longer it takes
1k 1k 1k 1k
(R (R (R (R
A A A A
+2R
+2R
+2R
+2R
LM555/NE555/SA555
B B B B
) ) ) )
10k
10k
10k
10k
100k
100k
100k
100k
5 5 5 5