TXC-06880BIOG Transwitch Corporation, TXC-06880BIOG Datasheet - Page 101

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TXC-06880BIOG

Manufacturer Part Number
TXC-06880BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06880BIOG

Operating Supply Voltage (typ)
1.8/3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-06880BIOG
Manufacturer:
SAMWHA
Quantity:
34 000
4008
(cont.)
PRELIMINARY TXC-06880-MB, Ed. 4
February 2005
(hex)
Addr
RW
RO
RW
RO
Mode
15-8
22-16
23
30-24
31
Range
Bit
Port 0 Ethernet Status and Configuration Register Description
value after
0x50
0x60
0x40
Default
reset
- Memory Maps and Bit Descriptions -
Minimum IFG Enforcement: This is a programmable field representing
the minimum number of bits of IFG to enforce between frames. A frame
whose IFG is less than that programmed is dropped or errored. The
default value of 0x50 (80d) represents half of the nominal minimum IFG
which is 160-bits. IFG = IPG + Preamble + SFD
If the IFIFO is configured for Store and Forward mode, the frame will be
dropped and will not appear on the SPI port. If the IFIFO is configured for
Streaming mode, the frame will appear on the SPI port with 4 additional
bad CRC bytes prepended to it.
When a port is configured in SMII mode, the allowed range of this register
is a minimum of 0x4 (four) up to a maximum of 0xFF. In addition, the lower
2 bits should be masked out since the granularity of this interface is nibble
based. (e.g., programming a value of 0x83 (or 0x81, 0x82) is functionally
equivalent to 0x80. A packet with an IFG of 0x80 will pass through the
device even though its value is less than 0x83 due to the nibble
granularity in SMII mode).
When a port is configured in GMII mode, the allowed range of this register
is a minimum of 0x8 (eight) up to a maximum of 0xFF. In addition, the
lower 3 bits should be masked out since the granularity of this interface is
byte based. (e.g., programming a value of 0x87 (or 0x81, 0x82...0x86) is
functionally equivalent to 0x80. A packet with an IFG of 0x80 will pass
through the device even though its value is less than 0x87 due to the byte
granularity in GMII mode).
Non-Back-to-Back Inter-Packet-Gap Part 2 (IPG2): This is a
programmable field representing the Non-Back-to-Back Inter-Packet-
Gap in bits. Default value is 0x60 (96d).
Note: For an IPG length of 96 and a 2/3 ratio, the values 0x20 and 0x7C
are required in the IPG1 and IPG2 locations, respectively.
Reserved
Non-Back-to-Back Inter-Packet-Gap Part 1 (IPG1): This is a
programmable field representing the optional Carrier Sense window
referenced in IEEE 802.3/4.2.3.2.1 ‘Carrier Deference’. If carrier is
detected during the timing of IPG1, the MAC defers to carrier. However, if
carrier becomes active after IPG1, the MAC continues timing IPG2 and
transmits, knowingly causing a collision, thus ensuring fair access to the
medium. Its range of values is 0x0 to IPG2. Default value is 0x40 (64d)
which follows the two-thirds/one-third guideline.
Note: For an IPG length of 96 and a 2/3 ratio, the values 0x20 and 0x7C
are required in the IPG1 and IPG2 locations, respectively.
Reserved
Description
Envoy-CE2 Device
DATA SHEET
TXC-06880
1 01 o f 12 2

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