TXC-06880BIOG Transwitch Corporation, TXC-06880BIOG Datasheet - Page 76

• Manufacturer Part Number: TXC-06880BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06880BIOG

• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

0014
0018
Envoy-CE2 Device
DATA SHEET
TXC-06880
7 6 o f 12 2
(hex)
Addr
RW
RO
RW
RW
RO
Mode Bit range
0
1
2
3
4
5
31-6
0
1
15
31-16
value after
0
0
0
0
0
0
0
1
1
1
Default
reset
-
Memory Maps and Bit Descriptions
Reset Ingress FIFO: Writing a 1 to this bit will reset the Ingress FIFO for
all ports. The host may access this register when the Ingress FIFO is in
reset state. Note: This Reset will reset the block specific configuration
registers.
Reset SPI-3 Output: Writing a 1 to this bit will reset the SPI-3 output
interface. The host may access this register when the SPI-3 output is in
reset state. Note: This Reset will reset the block specific configuration
registers.
Reset Egress FIFO: Writing a 1 to this bit will reset the Egress FIFO for
all ports. The host may access this register when the Egress FIFO is in
reset state. Note: This Reset will reset the block specific configuration
registers.
Reset SPI-3 Input: Writing a 1 to this bit will reset the SPI-3 input
interface. The host may access this register when the SPI-3 input is in
reset state. Note: This Reset will reset the block specific configuration
registers.
Reset MII Management Port: Writing a 1 to this bit will reset the MII
management port. The host may access this register when the MII
management port is in reset state. Note: This Reset will reset the block
specific configuration registers.
Reset Ethernet Statistics Module: Writing a 1 to this bit will reset the
Ethernet statistics module. The host may access this register when the
Ethernet statistics module is in reset state. Note: This Reset will reset the
block specific configuration registers.
Reserved
Interrupt Mask for Ethernet Port 0: Writing a 1 to this bit will mask the
interrupt from Ethernet Port 0. Writing a 0 to this bit will enable interrupts
from Ethernet Port 0.
Interrupt Mask for Ethernet Port 1: Writing a 1 to this bit will mask the
interrupt from Ethernet Port 1. Writing a 0 to this bit will enable interrupts
from Ethernet Port 1.
Interrupt Mask for Ethernet Port 15: Writing a 1 to this bit will mask the
interrupt from Ethernet Port 15. Writing a 0 to this bit will enable interrupts
from Ethernet Port 15.
Reserved
Description
-
PRELIMINARY TXC-06880-MB, Ed. 4
February 2005