SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 15

• Manufacturer Part Number: SLXT970AQC.B11-831643
• Manufacturer: Cortina Systems Inc

Specifications of SLXT970AQC.B11-831643

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

Datasheet
1. Pin numbers apply to all package types.
2. I/O Column Coding: I = Input, O = Output, OD = Open Drain, A = Analog.
3. FDE, CFG0, and CFG1 are affected by the MDDIS input pin. When MDDIS = 0, these inputs determine only the initial state
Pin#
13
14
33
of the function they control. When MDDIS = 1, these inputs provide continuous hardware control over their corresponding
functions.
Table 7.
1
Pin Name
CFG0
CFG1
FDE
Hardware Control Interface Signal Descriptions (Continued) (Sheet 2 of 2)
I/O
I
I
I
2
Full-Duplex Enable.
When A/N is enabled, FDE determines full-duplex advertisement capability in combination
with MF4 and CFG1.
When A/N is disabled, FDE directly affects full-duplex operation and determines the value of
bit 0.8 (Duplex Mode).
When FDE is High, full-duplex is enabled and 0.8 = 1.
When FDE is Low, full-duplex is disabled and 0.8 = 0.
Configuration Control 0.
When A/N is enabled, Low-to-High transition on CFG0 causes auto-negotiate to re-start and
0.9 = 1.
When A/N is disabled, this input selects operating speed and directly affects bit 0.13.
When CFG0 is High, 100 Mbps is selected and 0.13 = 1. If FX Operation is selected, this
input must be tied High.
When CFG0 is Low, 10 Mbps is selected and 0.13 = 0.
Configuration Control 1.
When A/N is enabled, CFG1 determines operating speed advertisement capabilities in
combination with MF4.
When A/N is disabled, CFG1 enables 10 Mbps link test function and directly affects bit 19.8.
When CFG1 is High, 10 Mbps link test is disabled and 19.8 = 1.
When CFG1 is Low, 10 Mbps link test is enabled and 19.8 = 0.
Intel
®
LXT970A Dual-Speed Fast Ethernet Transceiver
Signal Description
3
15