SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 26

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SLXT970AQC.B11-831643

Manufacturer Part Number
SLXT970AQC.B11-831643
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of SLXT970AQC.B11-831643

Number Of Receivers
1
Data Rate
10/100Mbps
Operating Supply Voltage (typ)
5V
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Mounting
Surface Mount
Pin Count
64
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Lead Free Status / RoHS Status
Not Compliant
Intel
2.2.4
.
26
Auto-Negotiation Disabled
Normal Operation
(DTE Mode, Nibble Mode, Scrambler Enabled)
Repeater Mode
Symbol Mode
Scrambler Bypass Mode
Advertise All
Advertise 100 HD
Advertise 100 HD/FD
Advertise 10 HD
Auto-Negotiation Enabled
1. Refer to
2. Refer to
1. Refer to
2. Refer to
Figure 10. Management Interface - Write Frame Structure
Table 12. Configuring the Intel
Table 13. Operating Configurations / Auto-Negotiation Enabled (Sheet 1 of 2)
®
(Write)
MDIO
LXT970A Dual-Speed Fast Ethernet Transceiver
MDC
Configuration
Idle
Desired
Table 13
Table 14
Table 12
Table 14
Preamble
Desired Configuration
32 "1"s
Hardware Control Interface
The Hardware Control Interface consists of MF<4:0>, CFG <1:0> and FDE input pins. This
interface is used to configure operating characteristics of the LXT970A Transceiver and to
determine the MDIO Address. When MDDIS is Low, the Hardware Control Interface provides
initial values for the MDIO registers, and then passes control to the MDIO Interface.
When MDDIS is High, the Hardware Control Interface provides continuous control over the
LXT970A Transceiver. Individual chip addressing allows multiple LXT970A Transceiver devices
to share the MII in either mode.
operating configurations using the Hardware Control Interface.
for Hardware Control Interface functions available when auto-negotiation is enabled.
for Hardware Control Interface functions available when auto-negotiation is disabled.
for basic configurations.
for Hardware Control Interface functions available when auto-negotiation is disabled.
1,2
0
2
1
SFD
1
0
V
V
V
V
Op Code
MF
MF
MF
MF
MF4
1, V
2, V
2, V
1, V
1
MF
MF
MF
MF
®
A4
4
3
3
4
LXT970A Transceiver Via Hardware Control
PHY Address
A3
Table
Input Value
A0
CFG1
High
Low
Low
Low
12,
Write
Pin Name
R4
Register Address
Table 13
MF0
MF0
MF1
MF2
MF3
MF1
MF2
MF3
R3
R0
and
Ignore
FDE
High
Low
Low
1
Table 14
Around
Turn
Voltage Level
0
V
V
V
V
V
V
MF
MF
MF
MF
MF
MF
2, V
1, V
1, V
2, V
2, V
2, V
D15
show how to set up the desired
MF
MF
MF
MF
MF
MF
4.5
1
0
0
1
3
4
4
3
3
3
D14
Data
MDIO Registers
D1
4.6
1
0
0
0
D0
MDIO Registers
19.13 = 0
19.13 = 1
0.12 = 1
0.12 = 0
19.4 = 0
19.3 = 0
19.4 = 1
19.3 = 1
4.7
1
1
1
0
Datasheet
Idle
4.8
1
0
1
0

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