SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 29

• Manufacturer Part Number: SLXT970AQC.B11-831643
• Manufacturer: Cortina Systems Inc

Specifications of SLXT970AQC.B11-831643

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

2.3.3
2.4
2.4.1
2.4.1.1
2.4.1.2
2.4.2
Datasheet
Table 15. Mode Control Settings
MHz or 2.5 MHz. Either frequency can be used during auto-negotiation. However, once link is
established, the supplied frequency must match the link state. A 25 MHz clock must be supplied
for correct operation of a 100TX or 100FX link, and a 2.5 MHz clock must be supplied for correct
operation of a 10BT link. In Slave Clock mode, XI is connected to ground and XO is left open.
Bias Circuit Requirements
A 22.1 kΩ 1% resistor must be tied between the RBIAS input and ground. High-speed signals
should be kept away from this resistor. Follow the layout recommendations given in the Design
Recommendations section on
Initialization
At power-up or reset, the LXT970A Transceiver performs the initialization sequence shown in
Figure
Control Mode Selection
Mode control selection is provided via the MDDIS pin as shown in
(MDDIS) is High, the LXT970A Transceiver enters Manual Control Mode. When MDDIS is Low,
MDIO Control Mode is enabled.
MDIO Control Mode
In the MDIO Control mode, the LXT970A Transceiver reads the Hardware Control Interface pins
to set the initial (default) values of the MDIO registers. Once the initial values are set, bit control
reverts to the MDIO interface.
Manual Control Mode
In the Manual Control Mode, LXT970A Transceiver disables direct write operations to the MDIO
registers via the MDIO Interface. The LXT970A Transceiver continuously monitors the Hardware
Control Interface pins and updates the MDIO registers accordingly.
Link Configuration
When the LXT970A Transceiver is first powered on, reset, or encounters a link failure state, it
must determine the line speed and operating conditions to use for the network link. The
LXT970A Transceiver first checks the MDIO registers (initialized via the Hardware Control
MDIO Control
Manual Control
Reset
Power Down
Mode
11.
MDDIS
High
Low
-
-
page
RESET
Intel
High
High
42.
Low
-
®
LXT970A Dual-Speed Fast Ethernet Transceiver
PWRDWN
High
Low
Low
Low
Table
15. When pin 15
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