BCM5482SA2IFBG Broadcom, BCM5482SA2IFBG Datasheet - Page 2

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BCM5482SA2IFBG

Manufacturer Part Number
BCM5482SA2IFBG
Description
Manufacturer
Broadcom
Datasheet

Specifications of BCM5482SA2IFBG

Number Of Receivers
2
Package Type
BGA
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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A member of Broadcom’s third generation of Gigabit Ethernet PHYs, the
BCM5482S consists of two complete 10/100/1000BASE-T Gigabit
Ethernet transceivers integrated on a single monolithic CMOS chip. The
BCM5482S is optimized for low power and small footprint size to reduce
design complexity for high-density uplink applications. For high-density
uplink applications, the single package offers a compelling advantage over
two single devices for Gigabit uplinks.
The BCM5482S DSP-based architecture and advanced power management
techniques combine to achieve robust and low-power operation over
existing Category 5 twisted-pair wiring. The BCM5482S architecture not
only meets the requirements of IEEE 802.3, IEEE 802.3u, and IEEE
802.3ab, but also maintains the industry’s highest level of margin over IEEE
requirements for echo, near-end crosstalk (NEXT), and far-end crosstalk
(FEXT). With the industry's lowest power at 725 mW per port, the
BCM5482S assists in reducing the power distribution requirements of IP
phone systems. In addition, the BCM5482S has extremely low EMI
emissions, which reduces the design constraints required to meet EMI
radiation specifications.
The BCM5482S supports the RGMII, SGMII, and SerDes MAC interfaces.
The RGMII, SGMII, and serial SerDes interfaces are reduced-pin-count (12,
6, and 4, respectively, versus 25) versions of the GMII. The RGMII clock
timing can be adjusted to eliminate the board trace delays required by the
RGMII specification. These reduced-pin-count interfaces simplify design
and lower system cost by reducing the number of layers required for signal
routing. In addition, these interfaces allow fewer pins at the MAC/switch,
which reduces the MAC/switch cost by enabling smaller die sizes than
would be possible with full GMII.
Broadcom
Corporation and/or its subsidiaries in the United States and certain other countries. All other trademarks
mentioned are the property of their respective owners.
BROADCOM CORPORATION
5300 California Avenue, P.O. Box 57013
Irvine, California 92617
© 2007 by BROADCOM CORPORATION. All rights reserved.
5482S-PB00-R
®
, the pulse logo, QuadSquad™, and Connecting everything
05/02/07
REG_SUP {2:1}
REG_OUT {2:1}
TRD2 [3:0] ±
TRD1 [3:0] ±
XTALO
XTALI
RDAC
®
PGA
Negotiation
Generator
Generator
Regulator
Voltage
Clock
Auto-
Bias
Correction
Baseline
Wander
TX DAC
ADC
®
BCM5482S Block Diagram
are trademarks of Broadcom
O V E R V I E W
Timing & Phase
Timing & Phase
Canceller
Recovery
Recovery
Echo
FFE
MII Registers
In most switch designs, a few ports are targeted as uplink ports to connect to
servers, switches, or remote links. These connections can be 10/100/
1000BASE-T, 1000BASE-SX/LX, or 100BASE-FX. In order to
accommodate these various interfaces, one or more SFP slots can be
designed into the switch and the user can plug an SFP module into the slot
that meets their specific requirement.
The BCM5482S addresses the specific problem of supporting multispeed
SFP uplinks. 1000BASE-X SFP modules require a SerDes interface to the
SFP module. 10/100/1000BASE-T and 100BASE-FX require an SGMII
interface in order to rate adapt to the lower speeds (less than 1 gigabit). The
BCM5482S can switch between any of these interfaces, depending on the
SFP module installed.
Each BCM5482S port is fully independent and has individual interface,
control, and status registers, and incorporates a number of advanced
features. This includes identifying physical wiring defects that the
BCM5482S cannot automatically correct and channel conditions such as
excessive cable length and return loss, crosstalk, echo, and noise.
Broadcom’s cable analyzer software can be used with the device to provide
remote management of the cable and a first level of diagnostics and fault
isolation.
The BCM5482S also has ESD tolerance that is well above typical industry
standards. This prevents ESD damage not only during manufacturing, but
also during CESD events in the field. The CESD is an ESD event that occurs
when an electrically charged network cable is plugged into a network port.
This issue is becoming more prevalent with contemporary cable
installations. The BCM5482S can tolerate over 3 kV of CESD.
Trellis Decoder
Canceller
XTALK
DFE &
x3
Symbol Decoder/
Symbol Encoder
MII Management
SGMII/SerDes
LED Drivers
Control
Aligner
Phone: 949-926-5000
Fax: 949-926-5203
E-mail: info@broadcom.com
Web: www.broadcom.com
TXD {2:1} [3:0]
TX_EN {2:1}
GTX_CLK {2:1}
SGIN_P1±
SGOUT_P1±
SGCLK_P1±
SGIN_P2±
SGOUT_P2±
SGCLK_P2±
S_SGIN_P1±
S_SGOUT_P1±
S_SGIN_P2±
S_SGOUT_P2±
RXC {2:1}
RX_DV {2:1}
RXD1[3:0]
RXD2[3:0]
LED_P1[1]/ANEN (LED1)
LED_P1[2]/INTR/FDX/SD (LED2)
LED_P1[3] (LED3)
LED_P1[4] (LED4)
LED_P2[1]/SPD0 (LED1)
LED_P2[2]/INTR/F1000/SD (LED2)
LED_P2[3] (LED3)
LED_P2[4] (LED4)
MDC_P1
MDIO_P1
MDC_P2
MDIO_P2
DRVSEL [1:0]
INTFSEL [1:0]

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