SLXT973QE Cortina Systems Inc, SLXT973QE Datasheet - Page 27

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SLXT973QE

Manufacturer Part Number
SLXT973QE
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of SLXT973QE

Lead Free Status / RoHS Status
Not Compliant
LXT973 Transceiver
Datasheet
249426, Revision 6.0
13 July 2007
Figure 4
Table 8
3.3.8
Cortina Systems
Test loopback is available for both 100BASE-TX and 10BASE-T operation and is enabled
by setting the following register bits:
Loopback Paths
Carrier Sense, Loopback, and Collision Conditions
Configuration Management Interface
The LXT973 Transceiver provides an MDIO Management Interface and a Hardware
Control Interface for device configuration and management.
®
100 Mbps
10 Mbps
1. Test loopback is enabled when Register bit 0.14 = 1, Register bit 0.8 = 1, and Register bit 0.12 = 0.
• Register bit 0.14 = 1 (loopback mode)
• Register bit 0.8 = 1 (full-duplex)
• Register bit 0.12 = 0 (disable auto-negotiation).
Speed
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Full-Duplex
Full-Duplex
Half-Duplex
Full-Duplex
Full-Duplex
Half-Duplex,
Register bit 16.8 = 0
Half-Duplex,
Register bit 16.8 = 1
Duplex Condition
MII
LXT973
Loopback
10T
Receive Only
Receive Only
Transmit or Receive
Receive Only
Receive Only
Transmit or Receive
Transmit or Receive
Carrier Sense
Digital
Block
Loopback
100X
Loopback
Test
Yes
Yes
Yes
No
No
No
No
Analog
Block
1
Operational
Loopback
Yes
No
No
No
No
No
No
Driver
Driver
FX
TX
3.3 MII Operation
Transmit and
Transmit and
Transmit and
Collision
Receive
Receive
Receive
None
None
None
None
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